2023-02-10 18:17:38 +00:00
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// Copyright © 2023 Intel Corporation
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//
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// SPDX-License-Identifier: Apache-2.0
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//
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2023-02-15 17:19:21 +00:00
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use argh::FromArgs;
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2023-02-10 18:17:38 +00:00
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use log::info;
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use pci::PciBarConfiguration;
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use std::{fs::File, io::Write, mem::size_of, num::Wrapping, path::PathBuf};
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use vfio_bindings::bindings::vfio::{
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vfio_region_info, VFIO_IRQ_INFO_EVENTFD, VFIO_IRQ_SET_ACTION_TRIGGER,
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VFIO_IRQ_SET_DATA_EVENTFD, VFIO_PCI_BAR2_REGION_INDEX, VFIO_PCI_CONFIG_REGION_INDEX,
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VFIO_PCI_INTX_IRQ_INDEX, VFIO_PCI_NUM_IRQS, VFIO_PCI_NUM_REGIONS, VFIO_REGION_INFO_FLAG_READ,
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VFIO_REGION_INFO_FLAG_WRITE,
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};
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use vfio_user::{IrqInfo, Server, ServerBackend};
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#[derive(Copy, Clone)]
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enum PciVfioUserSubclass {
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VfioUserSubclass = 0xff,
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}
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impl pci::PciSubclass for PciVfioUserSubclass {
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fn get_register_value(&self) -> u8 {
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*self as u8
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}
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}
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2023-02-15 17:19:21 +00:00
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#[derive(FromArgs)]
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/// GPIO test device
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struct Args {
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/// path to socket
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#[argh(option)]
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socket_path: String,
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}
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struct TestBackend {
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configuration: pci::PciConfiguration,
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irq: Option<File>,
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count: Wrapping<u8>,
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}
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impl TestBackend {
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fn new() -> TestBackend {
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let subclass = PciVfioUserSubclass::VfioUserSubclass;
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let mut configuration = pci::PciConfiguration::new(
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0x494f,
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0xdc8,
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0x0,
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pci::PciClassCode::Other,
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&subclass as &dyn pci::PciSubclass,
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None,
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pci::PciHeaderType::Device,
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0,
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0,
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None,
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None,
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);
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configuration
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.add_pci_bar(&PciBarConfiguration::new(
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VFIO_PCI_BAR2_REGION_INDEX as usize,
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0x100,
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pci::PciBarRegionType::IoRegion,
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pci::PciBarPrefetchable::NotPrefetchable,
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))
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.unwrap();
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configuration.set_irq(1, pci::PciInterruptPin::IntA);
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TestBackend {
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configuration,
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irq: None,
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count: Wrapping(0),
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}
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}
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}
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impl ServerBackend for TestBackend {
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fn region_read(
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&mut self,
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region: u32,
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offset: u64,
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data: &mut [u8],
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) -> Result<(), std::io::Error> {
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info!("read region = {region} offset = {offset}");
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if region == VFIO_PCI_CONFIG_REGION_INDEX {
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let reg_idx = offset as usize / 4;
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let v = self.configuration.read_config_register(reg_idx);
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let reg_offset = offset as usize % 4;
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data.copy_from_slice(&v.to_le_bytes()[reg_offset..reg_offset + data.len()]);
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} else if region == VFIO_PCI_BAR2_REGION_INDEX && offset == 0 {
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info!("gpio value read: count = {}", self.count);
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self.count += 1;
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if self.count.0 % 3 == 0 {
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data[0] = 1;
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if let Some(irq) = &mut self.irq {
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info!("Triggering interrupt for count = {}", self.count);
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irq.write_all(&1u64.to_le_bytes()).unwrap();
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}
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}
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}
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Ok(())
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}
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fn region_write(
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&mut self,
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region: u32,
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offset: u64,
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data: &[u8],
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) -> Result<(), std::io::Error> {
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info!("write region = {region} offset = {offset}");
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if region == VFIO_PCI_CONFIG_REGION_INDEX {
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self.configuration
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.write_config_register(offset as usize / 4, offset % 4, data);
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}
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Ok(())
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}
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fn dma_map(
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&mut self,
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flags: vfio_user::DmaMapFlags,
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offset: u64,
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address: u64,
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size: u64,
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fd: Option<&File>,
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) -> Result<(), std::io::Error> {
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info!("dma_map flags = {flags:?} offset = {offset} address = {address} size = {size} fd = {fd:?}");
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Ok(())
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}
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fn dma_unmap(
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&mut self,
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flags: vfio_user::DmaUnmapFlags,
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address: u64,
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size: u64,
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) -> Result<(), std::io::Error> {
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info!("dma_unmap flags = {flags:?} address = {address} size = {size}");
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Ok(())
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}
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fn reset(&mut self) -> Result<(), std::io::Error> {
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info!("reset");
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Ok(())
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}
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fn set_irqs(
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&mut self,
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index: u32,
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flags: u32,
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start: u32,
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count: u32,
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fds: Vec<File>,
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) -> Result<(), std::io::Error> {
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info!("set_irqs index = {index} flags = {flags} start = {start} count = {count} fds = {fds:?}");
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if flags & (VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER) > 0 {
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if count == 1 {
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self.irq = Some(fds[0].try_clone().unwrap());
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} else {
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self.irq = None;
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}
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}
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Ok(())
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}
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}
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fn create_regions() -> Vec<vfio_region_info> {
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let mut regions = Vec::with_capacity(VFIO_PCI_NUM_REGIONS as usize);
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for index in 0..VFIO_PCI_NUM_REGIONS {
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let mut region = vfio_region_info {
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argsz: size_of::<vfio_region_info>() as u32,
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index,
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..Default::default()
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};
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if index == VFIO_PCI_CONFIG_REGION_INDEX || index == VFIO_PCI_BAR2_REGION_INDEX {
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region.size = 256;
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region.flags = VFIO_REGION_INFO_FLAG_READ | VFIO_REGION_INFO_FLAG_WRITE;
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}
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regions.push(region);
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}
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regions
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}
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fn create_irqs() -> Vec<IrqInfo> {
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let mut irqs = Vec::with_capacity(VFIO_PCI_NUM_IRQS as usize);
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for index in 0..VFIO_PCI_NUM_IRQS {
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let mut irq = IrqInfo {
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index,
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count: 0,
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flags: 0,
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};
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if index == VFIO_PCI_INTX_IRQ_INDEX {
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irq.count = 1;
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irq.flags = VFIO_IRQ_INFO_EVENTFD
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}
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irqs.push(irq);
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}
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irqs
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}
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fn main() {
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let a: Args = argh::from_env();
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env_logger::init();
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let regions = create_regions();
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let irqs = create_irqs();
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let path = PathBuf::from(a.socket_path);
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let s = Server::new(&path, true, irqs, regions).unwrap();
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let mut test_backend = TestBackend::new();
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s.run(&mut test_backend).unwrap();
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}
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