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# Intel SGX
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Intel® Software Guard Extensions (Intel® SGX) is an Intel technology designed
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to increase the security of application code and data. Cloud Hypervisor supports
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SGX virtualization through KVM. Because SGX is built on hardware features that
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cannot be emulated in software, virtualizing SGX requires support in KVM and in
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the host kernel. The required Linux and KVM changes can be found in the
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[KVM SGX Tree](https://github.com/intel/kvm-sgx).
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Utilizing SGX in the guest requires a kernel/OS with SGX support, e.g. a kernel
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built using the [SGX Linux Development Tree](https://git.kernel.org/pub/scm/linux/kernel/git/jarkko/linux-sgx.git)
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or the [KVM SGX Tree](https://github.com/intel/kvm-sgx). Running KVM SGX as the
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guest kernel allows nested virtualization of SGX.
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For more information about SGX, please refer to the [SGX Homepage](https://software.intel.com/sgx).
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For more information about SGX SDK and how to test SGX, please refer to the
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following [instructions](https://github.com/intel/linux-sgx).
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## Cloud Hypervisor support
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2021-04-29 11:52:16 +00:00
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Assuming the host exposes `/dev/sgx_vepc`, we can pass SGX enclaves through
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the guest.
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In order to use SGX enclaves within a Cloud Hypervisor VM, we must define one
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or several Enclave Page Cache (EPC) sections. Here is an example of a VM being
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created with 2 EPC sections, the first one being 64MiB with pre-allocated
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memory, the second one being 32MiB with no pre-allocated memory.
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```bash
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./cloud-hypervisor \
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--cpus boot=1 \
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--memory size=1G \
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--disk path=focal-server-cloudimg-amd64.raw \
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--kernel vmlinux \
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--cmdline "console=ttyS0 console=hvc0 root=/dev/vda1 rw" \
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--sgx-epc id=epc0,size=64M,prefault=on id=epc1,size=32M,prefault=off
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```
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Once booted, and assuming your guest kernel contains the patches from the
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[KVM SGX Tree](https://github.com/intel/kvm-sgx), you can validate SGX devices
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have been correctly created under `/dev/sgx`:
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```bash
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ls /dev/sgx*
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/dev/sgx_enclave /dev/sgx_provision /dev/sgx_vepc
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```
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From this point, it is possible to run any SGX application from the guest, as
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it will access `/dev/sgx_enclave` device to create dedicated SGX enclaves.
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Note: There is only one contiguous SGX EPC region, which contains all SGX EPC
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sections. This region is exposed through ACPI and marked as reserved through
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the e820 table. It is treated as yet another device, which means it should
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appear at the end of the guest address space.
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