2019-04-18 09:59:12 +00:00
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// Copyright 2018 The Chromium OS Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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2019-05-08 10:22:53 +00:00
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// found in the LICENSE-BSD-3-Clause file.
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2019-04-18 09:59:12 +00:00
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//! Implements pci devices and busses.
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#[macro_use]
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extern crate log;
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extern crate devices;
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extern crate kvm_ioctls;
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extern crate vm_memory;
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extern crate vmm_sys_util;
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mod configuration;
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mod device;
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2019-05-29 23:33:29 +00:00
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mod msix;
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2019-04-18 09:59:12 +00:00
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mod root;
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pub use self::configuration::{
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PciBarConfiguration, PciBarPrefetchable, PciBarRegionType, PciCapability, PciCapabilityID,
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PciClassCode, PciConfiguration, PciHeaderType, PciProgrammingInterface, PciSerialBusSubClass,
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PciSubclass,
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};
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pub use self::device::Error as PciDeviceError;
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2019-06-05 16:53:24 +00:00
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pub use self::device::{InterruptDelivery, InterruptParameters, PciDevice};
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2019-05-29 23:33:29 +00:00
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pub use self::msix::{MsixCap, MsixConfig, MsixTableEntry};
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2019-04-18 09:59:12 +00:00
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pub use self::root::{PciConfigIo, PciConfigMmio, PciRoot, PciRootError};
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/// PCI has four interrupt pins A->D.
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#[derive(Copy, Clone)]
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pub enum PciInterruptPin {
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IntA,
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IntB,
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IntC,
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IntD,
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}
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impl PciInterruptPin {
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pub fn to_mask(self) -> u32 {
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self as u32
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}
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}
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