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pci: Export network and mass storage sub classes
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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@ -124,6 +124,50 @@ impl PciSubclass for PciSerialBusSubClass {
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}
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}
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/// Mass Storage Sub Classes
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#[allow(dead_code)]
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#[derive(Copy, Clone)]
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pub enum PciMassStorageSubclass {
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SCSIStorage = 0x00,
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IDEInterface = 0x01,
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FloppyController = 0x02,
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IPIController = 0x03,
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RAIDController = 0x04,
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ATAController = 0x05,
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SATAController = 0x06,
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SerialSCSIController = 0x07,
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NVMController = 0x08,
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MassStorage = 0x80,
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}
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impl PciSubclass for PciMassStorageSubclass {
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fn get_register_value(&self) -> u8 {
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*self as u8
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}
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}
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/// Network Controller Sub Classes
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#[allow(dead_code)]
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#[derive(Copy, Clone)]
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pub enum PciNetworkControllerSubclass {
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EthernetController = 0x00,
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TokenRingController = 0x01,
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FDDIController = 0x02,
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ATMController = 0x03,
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ISDNController = 0x04,
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WorldFipController = 0x05,
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PICMGController = 0x06,
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InfinibandController = 0x07,
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FabricController = 0x08,
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NetworkController = 0x80,
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}
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impl PciSubclass for PciNetworkControllerSubclass {
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fn get_register_value(&self) -> u8 {
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*self as u8
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}
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}
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/// A PCI class programming interface. Each combination of `PciClassCode` and
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/// `PciSubclass` can specify a set of register-level programming interfaces.
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/// This trait is implemented by each programming interface.
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@ -17,8 +17,8 @@ mod root;
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pub use self::configuration::{
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PciBarConfiguration, PciBarPrefetchable, PciBarRegionType, PciCapability, PciCapabilityID,
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PciClassCode, PciConfiguration, PciHeaderType, PciProgrammingInterface, PciSerialBusSubClass,
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PciSubclass,
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PciClassCode, PciConfiguration, PciHeaderType, PciMassStorageSubclass,
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PciNetworkControllerSubclass, PciProgrammingInterface, PciSerialBusSubClass, PciSubclass,
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};
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pub use self::device::Error as PciDeviceError;
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pub use self::device::{InterruptDelivery, InterruptParameters, PciDevice};
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