From 0c27f69f1cc172bd015c8411b2db7af80a3e76cf Mon Sep 17 00:00:00 2001 From: Rob Bradford Date: Thu, 25 Mar 2021 17:01:21 +0000 Subject: [PATCH] hypervisor: Address Rust 1.51.0 clippy issue (upper_case_acroynms) warning: name `TranslateGVA` contains a capitalized acronym --> hypervisor/src/arch/emulator/mod.rs:51:5 | 51 | TranslateGVA(#[source] anyhow::Error), | ^^^^^^^^^^^^ help: consider making the acronym lowercase, except the initial letter: `TranslateGva` | = note: `#[warn(clippy::upper_case_acronyms)]` on by default = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#upper_case_acronyms Signed-off-by: Rob Bradford --- hypervisor/src/arch/emulator/mod.rs | 2 +- .../src/arch/x86/emulator/instructions/cmp.rs | 14 ++++---- .../src/arch/x86/emulator/instructions/mov.rs | 34 +++++++++---------- .../arch/x86/emulator/instructions/movs.rs | 8 ++--- hypervisor/src/arch/x86/emulator/mod.rs | 18 +++++----- hypervisor/src/arch/x86/mod.rs | 2 +- hypervisor/src/cpu.rs | 4 +-- hypervisor/src/kvm/mod.rs | 2 +- hypervisor/src/mshv/mod.rs | 6 ++-- 9 files changed, 45 insertions(+), 45 deletions(-) diff --git a/hypervisor/src/arch/emulator/mod.rs b/hypervisor/src/arch/emulator/mod.rs index ce2d3bd37..9725ac831 100644 --- a/hypervisor/src/arch/emulator/mod.rs +++ b/hypervisor/src/arch/emulator/mod.rs @@ -48,7 +48,7 @@ pub enum PlatformError { SetCpuStateFailure(#[source] anyhow::Error), #[error("Translate virtual address: {0}")] - TranslateGVA(#[source] anyhow::Error), + TranslateVirtualAddress(#[source] anyhow::Error), #[error("Unsupported CPU Mode: {0}")] UnsupportedCpuMode(#[source] anyhow::Error), diff --git a/hypervisor/src/arch/x86/emulator/instructions/cmp.rs b/hypervisor/src/arch/x86/emulator/instructions/cmp.rs index 30e11cedb..058e31658 100644 --- a/hypervisor/src/arch/x86/emulator/instructions/cmp.rs +++ b/hypervisor/src/arch/x86/emulator/instructions/cmp.rs @@ -4,7 +4,7 @@ // SPDX-License-Identifier: Apache-2.0 // -#![allow(non_camel_case_types)] +#![allow(non_camel_case_types, clippy::upper_case_acronyms)] // // CMP-Compare Two Operands @@ -229,7 +229,7 @@ mod tests { let ip: u64 = 0x1000; let cpu_id = 0; let insn = [0x38, 0xc4]; // cmp ah,al - let mut vmm = MockVMM::new(ip, vec![(Register::RAX, rax)], None); + let mut vmm = MockVmm::new(ip, vec![(Register::RAX, rax)], None); assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok()); let rflags: u64 = vmm.cpu_state(cpu_id).unwrap().flags() & FLAGS_MASK; @@ -243,7 +243,7 @@ mod tests { let ip: u64 = 0x1000; let cpu_id = 0; let insn = [0x83, 0xf8, 0x64]; // cmp eax,100 - let mut vmm = MockVMM::new(ip, vec![(Register::RAX, rax)], None); + let mut vmm = MockVmm::new(ip, vec![(Register::RAX, rax)], None); assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok()); let rflags: u64 = vmm.cpu_state(cpu_id).unwrap().flags() & FLAGS_MASK; @@ -257,7 +257,7 @@ mod tests { let ip: u64 = 0x1000; let cpu_id = 0; let insn = [0x83, 0xf8, 0xff]; // cmp eax,-1 - let mut vmm = MockVMM::new(ip, vec![(Register::RAX, rax)], None); + let mut vmm = MockVmm::new(ip, vec![(Register::RAX, rax)], None); assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok()); let rflags: u64 = vmm.cpu_state(cpu_id).unwrap().flags() & FLAGS_MASK; @@ -272,7 +272,7 @@ mod tests { let ip: u64 = 0x1000; let cpu_id = 0; let insn = [0x48, 0x39, 0xd8, 0x00, 0xc3]; // cmp rax,rbx + two bytes garbage - let mut vmm = MockVMM::new(ip, vec![(Register::RAX, rax), (Register::RBX, rbx)], None); + let mut vmm = MockVmm::new(ip, vec![(Register::RAX, rax), (Register::RBX, rbx)], None); assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok()); let rflags: u64 = vmm.cpu_state(cpu_id).unwrap().flags() & FLAGS_MASK; @@ -295,7 +295,7 @@ mod tests { let rax = d.0; let rbx = d.1; let insn = [0x48, 0x39, 0xd8]; // cmp rax,rbx - let mut vmm = MockVMM::new( + let mut vmm = MockVmm::new( 0x1000, vec![(Register::RAX, rax), (Register::RBX, rbx)], None, @@ -323,7 +323,7 @@ mod tests { let rax = d.0; let rbx = d.1; let insn = [0x39, 0xd8]; // cmp eax,ebx - let mut vmm = MockVMM::new( + let mut vmm = MockVmm::new( 0x1000, vec![(Register::RAX, rax), (Register::RBX, rbx)], None, diff --git a/hypervisor/src/arch/x86/emulator/instructions/mov.rs b/hypervisor/src/arch/x86/emulator/instructions/mov.rs index b5f45d10e..c2fe19e9e 100644 --- a/hypervisor/src/arch/x86/emulator/instructions/mov.rs +++ b/hypervisor/src/arch/x86/emulator/instructions/mov.rs @@ -254,7 +254,7 @@ mod tests { let ip: u64 = 0x1000; let cpu_id = 0; let insn = [0x48, 0x89, 0xd8]; - let mut vmm = MockVMM::new(ip, vec![(Register::RBX, rbx)], None); + let mut vmm = MockVmm::new(ip, vec![(Register::RBX, rbx)], None); assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok()); let rax: u64 = vmm @@ -272,7 +272,7 @@ mod tests { let ip: u64 = 0x1000; let cpu_id = 0; let insn = [0x48, 0xb8, 0x44, 0x33, 0x22, 0x11, 0x44, 0x33, 0x22, 0x11]; - let mut vmm = MockVMM::new(ip, vec![], None); + let mut vmm = MockVmm::new(ip, vec![], None); assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok()); let rax: u64 = vmm @@ -292,7 +292,7 @@ mod tests { let cpu_id = 0; let memory: [u8; 8] = target_rax.to_le_bytes(); let insn = [0x48, 0x8b, 0x04, 0x00]; - let mut vmm = MockVMM::new(ip, vec![(Register::RAX, rax)], Some((rax + rax, &memory))); + let mut vmm = MockVmm::new(ip, vec![(Register::RAX, rax)], Some((rax + rax, &memory))); assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok()); rax = vmm @@ -310,7 +310,7 @@ mod tests { let ip: u64 = 0x1000; let cpu_id = 0; let insn = [0xb0, 0x11]; - let mut vmm = MockVMM::new(ip, vec![], None); + let mut vmm = MockVmm::new(ip, vec![], None); assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok()); let al = vmm @@ -328,7 +328,7 @@ mod tests { let ip: u64 = 0x1000; let cpu_id = 0; let insn = [0xb8, 0x11, 0x00, 0x00, 0x00]; - let mut vmm = MockVMM::new(ip, vec![], None); + let mut vmm = MockVmm::new(ip, vec![], None); assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok()); let eax = vmm @@ -346,7 +346,7 @@ mod tests { let ip: u64 = 0x1000; let cpu_id = 0; let insn = [0x48, 0xc7, 0xc0, 0x44, 0x33, 0x22, 0x11]; - let mut vmm = MockVMM::new(ip, vec![], None); + let mut vmm = MockVmm::new(ip, vec![], None); assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok()); let rax: u64 = vmm @@ -365,7 +365,7 @@ mod tests { let ip: u64 = 0x1000; let cpu_id = 0; let insn = [0x88, 0x30]; - let mut vmm = MockVMM::new( + let mut vmm = MockVmm::new( ip, vec![(Register::RAX, rax), (Register::DH, dh.into())], None, @@ -386,7 +386,7 @@ mod tests { let ip: u64 = 0x1000; let cpu_id = 0; let insn = [0x89, 0x30]; - let mut vmm = MockVMM::new( + let mut vmm = MockVmm::new( ip, vec![(Register::RAX, rax), (Register::ESI, esi.into())], None, @@ -408,7 +408,7 @@ mod tests { let ip: u64 = 0x1000; let cpu_id = 0; let insn = [0x89, 0x3c, 0x05, 0x01, 0x00, 0x00, 0x00]; - let mut vmm = MockVMM::new( + let mut vmm = MockVmm::new( ip, vec![(Register::RAX, rax), (Register::EDI, edi.into())], None, @@ -431,7 +431,7 @@ mod tests { let ip: u64 = 0x1000; let cpu_id = 0; let insn = [0x8b, 0x40, 0x10]; - let mut vmm = MockVMM::new( + let mut vmm = MockVmm::new( ip, vec![(Register::RAX, rax)], Some((rax + displacement, &memory)), @@ -456,7 +456,7 @@ mod tests { let cpu_id = 0; let insn = [0x8a, 0x40, 0x10]; let memory: [u8; 1] = al.to_le_bytes(); - let mut vmm = MockVMM::new( + let mut vmm = MockVmm::new( ip, vec![(Register::RAX, rax)], Some((rax + displacement, &memory)), @@ -485,7 +485,7 @@ mod tests { 0x48, 0xc7, 0xc0, 0x00, 0x01, 0x00, 0x00, // mov rax, 0x100 0x48, 0x8b, 0x58, 0x10, // mov rbx, qword ptr [rax+10h] ]; - let mut vmm = MockVMM::new(ip, vec![], Some((rax + displacement, &memory))); + let mut vmm = MockVmm::new(ip, vec![], Some((rax + displacement, &memory))); assert!(vmm.emulate_insn(cpu_id, &insn, Some(2)).is_ok()); let rbx: u64 = vmm @@ -511,7 +511,7 @@ mod tests { 0x48, 0x8b, 0x58, 0x10, // mov rbx, qword ptr [rax+10h] ]; - let mut vmm = MockVMM::new(ip, vec![], Some((rax + displacement, &memory))); + let mut vmm = MockVmm::new(ip, vec![], Some((rax + displacement, &memory))); // Only run the first instruction. assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok()); @@ -542,7 +542,7 @@ mod tests { 0x48, 0xc7, 0xc0, 0x00, 0x02, 0x00, 0x00, // mov rax, 0x200 ]; - let mut vmm = MockVMM::new(ip, vec![], Some((rax + displacement, &memory))); + let mut vmm = MockVmm::new(ip, vec![], Some((rax + displacement, &memory))); // Run the 2 first instructions. assert!(vmm.emulate_insn(cpu_id, &insn, Some(2)).is_ok()); @@ -571,7 +571,7 @@ mod tests { let ip: u64 = 0x1000; let cpu_id = 0; let insn = [0x0f, 0xb6, 0xc3]; - let mut vmm = MockVMM::new(ip, vec![(Register::BX, bx as u64)], None); + let mut vmm = MockVmm::new(ip, vec![(Register::BX, bx as u64)], None); assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok()); let eax: u64 = vmm @@ -589,7 +589,7 @@ mod tests { let ip: u64 = 0x1000; let cpu_id = 0; let insn = [0x0f, 0xb6, 0xc7]; - let mut vmm = MockVMM::new(ip, vec![(Register::BX, bx as u64)], None); + let mut vmm = MockVmm::new(ip, vec![(Register::BX, bx as u64)], None); assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok()); let eax: u64 = vmm @@ -609,7 +609,7 @@ mod tests { let cpu_id = 0; let insn = [0x0f, 0xb7, 0x03]; let memory: [u8; 1] = value.to_le_bytes(); - let mut vmm = MockVMM::new(ip, vec![(Register::RBX, rbx)], Some((rbx, &memory))); + let mut vmm = MockVmm::new(ip, vec![(Register::RBX, rbx)], Some((rbx, &memory))); assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok()); let eax: u64 = vmm diff --git a/hypervisor/src/arch/x86/emulator/instructions/movs.rs b/hypervisor/src/arch/x86/emulator/instructions/movs.rs index 230645152..3c9e9281c 100644 --- a/hypervisor/src/arch/x86/emulator/instructions/movs.rs +++ b/hypervisor/src/arch/x86/emulator/instructions/movs.rs @@ -107,7 +107,7 @@ mod tests { let regs = vec![(Register::ECX, 3), (Register::ESI, 0), (Register::EDI, 0xc)]; let mut data = [0u8; 4]; - let mut vmm = MockVMM::new(ip, regs, Some((0, &memory))); + let mut vmm = MockVmm::new(ip, regs, Some((0, &memory))); assert!(vmm.emulate_first_insn(0, &insn).is_ok()); @@ -117,7 +117,7 @@ mod tests { assert_eq!(0xaabbccdd, ::from_le_bytes(data)); vmm.read_memory(0xc + 8, &mut data).unwrap(); assert_eq!(0x5aa55aa5, ::from_le_bytes(data)); - // The rest should be default value 0 from MockVMM + // The rest should be default value 0 from MockVmm vmm.read_memory(0xc + 12, &mut data).unwrap(); assert_eq!(0x0, ::from_le_bytes(data)); } @@ -132,13 +132,13 @@ mod tests { let regs = vec![(Register::ESI, 0), (Register::EDI, 0x8)]; let mut data = [0u8; 4]; - let mut vmm = MockVMM::new(ip, regs, Some((0, &memory))); + let mut vmm = MockVmm::new(ip, regs, Some((0, &memory))); assert!(vmm.emulate_first_insn(0, &insn).is_ok()); vmm.read_memory(0x8, &mut data).unwrap(); assert_eq!(0x12345678, ::from_le_bytes(data)); - // The rest should be default value 0 from MockVMM + // The rest should be default value 0 from MockVmm vmm.read_memory(0x4, &mut data).unwrap(); assert_eq!(0x0, ::from_le_bytes(data)); vmm.read_memory(0x8 + 8, &mut data).unwrap(); diff --git a/hypervisor/src/arch/x86/emulator/mod.rs b/hypervisor/src/arch/x86/emulator/mod.rs index e45505ef8..92e4c61cb 100644 --- a/hypervisor/src/arch/x86/emulator/mod.rs +++ b/hypervisor/src/arch/x86/emulator/mod.rs @@ -650,17 +650,17 @@ mod mock_vmm { use std::sync::{Arc, Mutex}; #[derive(Debug, Clone)] - pub struct MockVMM { + pub struct MockVmm { memory: Vec, state: Arc>, } - unsafe impl Sync for MockVMM {} + unsafe impl Sync for MockVmm {} pub type MockResult = Result<(), EmulationError>; - impl MockVMM { - pub fn new(ip: u64, regs: Vec<(Register, u64)>, memory: Option<(u64, &[u8])>) -> MockVMM { + impl MockVmm { + pub fn new(ip: u64, regs: Vec<(Register, u64)>, memory: Option<(u64, &[u8])>) -> MockVmm { let _ = env_logger::try_init(); let cs_reg = segment_from_gdt(gdt_entry(0xc09b, 0, 0xffffffff), 1); let ds_reg = segment_from_gdt(gdt_entry(0xc093, 0, 0xffffffff), 2); @@ -674,7 +674,7 @@ mod mock_vmm { initial_state.write_reg(reg, value).unwrap(); } - let mut vmm = MockVMM { + let mut vmm = MockVmm { memory: vec![0; 8192], state: Arc::new(Mutex::new(initial_state)), }; @@ -710,7 +710,7 @@ mod mock_vmm { } } - impl PlatformEmulator for MockVMM { + impl PlatformEmulator for MockVmm { type CpuState = CpuState; fn read_memory(&self, gva: u64, data: &mut [u8]) -> Result<(), PlatformError> { @@ -792,7 +792,7 @@ mod tests { 0x48, 0xc7, 0xc0, 0x00, // mov rax, 0x1000 -- Missing bytes: 0x00, 0x10, 0x00, 0x00, ]; - let mut vmm = MockVMM::new(ip, vec![], Some((ip, &memory))); + let mut vmm = MockVmm::new(ip, vec![], Some((ip, &memory))); assert!(vmm.emulate_insn(cpu_id, &insn, Some(2)).is_ok()); let rax: u64 = vmm @@ -827,7 +827,7 @@ mod tests { 0x48, 0x8b, // Truncated mov rbx, qword ptr [rax+10h] -- missing [0x58, 0x10] ]; - let mut vmm = MockVMM::new(ip, vec![], Some((ip, &memory))); + let mut vmm = MockVmm::new(ip, vec![], Some((ip, &memory))); assert!(vmm.emulate_insn(cpu_id, &insn, Some(2)).is_ok()); let rbx: u64 = vmm @@ -857,7 +857,7 @@ mod tests { 0x48, 0xc7, 0xc0, 0x00, // mov rax, 0x1000 -- Missing bytes: 0x00, 0x10, 0x00, 0x00, ]; - let mut vmm = MockVMM::new(ip, vec![], Some((ip, &memory))); + let mut vmm = MockVmm::new(ip, vec![], Some((ip, &memory))); assert!(vmm.emulate_first_insn(cpu_id, &insn).is_err()); } } diff --git a/hypervisor/src/arch/x86/mod.rs b/hypervisor/src/arch/x86/mod.rs index 8f4ba2247..087ba7676 100644 --- a/hypervisor/src/arch/x86/mod.rs +++ b/hypervisor/src/arch/x86/mod.rs @@ -27,7 +27,7 @@ pub const MTRR_MEM_TYPE_WB: u64 = 0x6; pub const NUM_IOAPIC_PINS: usize = 24; // X86 Exceptions -#[allow(dead_code)] +#[allow(dead_code, clippy::upper_case_acronyms)] #[derive(Clone, Debug)] pub enum Exception { DE = 0, // Divide Error diff --git a/hypervisor/src/cpu.rs b/hypervisor/src/cpu.rs index 70d299e5b..d49c85415 100644 --- a/hypervisor/src/cpu.rs +++ b/hypervisor/src/cpu.rs @@ -174,7 +174,7 @@ pub enum HypervisorCpuError { /// Enabling HyperV SynIC error /// #[error("Failed to enable HyperV SynIC")] - EnableHyperVSynIC(#[source] anyhow::Error), + EnableHyperVSyncIc(#[source] anyhow::Error), /// /// Getting AArch64 core register error /// @@ -204,7 +204,7 @@ pub enum HypervisorCpuError { /// GVA translation error /// #[error("Failed to translate GVA: {0}")] - TranslateGVA(#[source] anyhow::Error), + TranslateVirtualAddress(#[source] anyhow::Error), /// /// Failed to initialize TDX on CPU /// diff --git a/hypervisor/src/kvm/mod.rs b/hypervisor/src/kvm/mod.rs index f586bec42..985ea9ad1 100644 --- a/hypervisor/src/kvm/mod.rs +++ b/hypervisor/src/kvm/mod.rs @@ -709,7 +709,7 @@ impl cpu::Vcpu for KvmVcpu { }; self.fd .enable_cap(&cap) - .map_err(|e| cpu::HypervisorCpuError::EnableHyperVSynIC(e.into())) + .map_err(|e| cpu::HypervisorCpuError::EnableHyperVSyncIc(e.into())) } /// /// X86 specific call to retrieve the CPUID registers. diff --git a/hypervisor/src/mshv/mod.rs b/hypervisor/src/mshv/mod.rs index d0930e708..f1f3f9c1e 100644 --- a/hypervisor/src/mshv/mod.rs +++ b/hypervisor/src/mshv/mod.rs @@ -530,7 +530,7 @@ impl cpu::Vcpu for MshvVcpu { let r = self .fd .translate_gva(gva, flags) - .map_err(|e| cpu::HypervisorCpuError::TranslateGVA(e.into()))?; + .map_err(|e| cpu::HypervisorCpuError::TranslateVirtualAddress(e.into()))?; Ok(r) } @@ -555,12 +555,12 @@ impl<'a> MshvEmulatorContext<'a> { let r = self .vcpu .translate_gva(gva, flags.into()) - .map_err(|e| PlatformError::TranslateGVA(anyhow!(e)))?; + .map_err(|e| PlatformError::TranslateVirtualAddress(anyhow!(e)))?; let result_code = unsafe { r.1.__bindgen_anon_1.result_code }; match result_code { hv_translate_gva_result_code_HvTranslateGvaSuccess => Ok(r.0), - _ => Err(PlatformError::TranslateGVA(anyhow!(result_code))), + _ => Err(PlatformError::TranslateVirtualAddress(anyhow!(result_code))), } } }