mirror of
https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2024-10-01 11:05:46 +00:00
vmm: Extract PCI related state from DeviceManager
Move the PCI related state from the DeviceManager struct to a PciSegment struct inside the DeviceManager. This is in preparation for multiple segment support. Currently this state is just the bus itself, the MMIO and PIO config devices and hotplug related state. The main change that this required is using the Arc<Mutex<PciBus>> in the device addition logic in order to ensure that the bus could be created earlier. Signed-off-by: Rob Bradford <robert.bradford@intel.com>
This commit is contained in:
Rob Bradford
parent
9aadbbe6d9
commit
0eb78ab177
@ -188,25 +188,20 @@ impl PciBus {
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}
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}
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#[derive(Default)]
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pub struct PciConfigIo {
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/// Config space register.
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config_address: u32,
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pci_bus: Option<Arc<Mutex<PciBus>>>,
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pci_bus: Arc<Mutex<PciBus>>,
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}
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impl PciConfigIo {
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pub fn new() -> Self {
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pub fn new(pci_bus: Arc<Mutex<PciBus>>) -> Self {
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PciConfigIo {
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config_address: 0,
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pci_bus: None,
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pci_bus,
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}
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}
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pub fn set_bus(&mut self, pci_bus: Arc<Mutex<PciBus>>) {
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self.pci_bus = Some(pci_bus)
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}
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pub fn config_space_read(&self) -> u32 {
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let enabled = (self.config_address & 0x8000_0000) != 0;
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if !enabled {
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@ -228,7 +223,6 @@ impl PciConfigIo {
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self.pci_bus
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.as_ref()
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.unwrap()
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.lock()
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.unwrap()
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.devices
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@ -256,7 +250,7 @@ impl PciConfigIo {
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return None;
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}
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let pci_bus = self.pci_bus.as_ref().unwrap().lock().unwrap();
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let pci_bus = self.pci_bus.as_ref().lock().unwrap();
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if let Some(d) = pci_bus.devices.get(&(device as u32)) {
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let mut device = d.lock().unwrap();
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@ -826,11 +826,7 @@ pub struct DeviceManager {
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// Counter to keep track of the consumed device IDs.
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device_id_cnt: Wrapping<usize>,
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// Keep a reference to the PCI bus
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pci_bus: Option<Arc<Mutex<PciBus>>>,
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#[cfg(target_arch = "x86_64")]
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pci_config_io: Arc<Mutex<PciConfigIo>>,
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pci_segment: PciSegment,
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#[cfg_attr(target_arch = "aarch64", allow(dead_code))]
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// MSI Interrupt Manager
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@ -857,15 +853,6 @@ pub struct DeviceManager {
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// information for filling the ACPI VIOT table.
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iommu_attached_devices: Option<(u32, Vec<u32>)>,
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// Bitmap of PCI devices to hotplug.
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pci_devices_up: u32,
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// Bitmap of PCI devices to hotunplug.
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pci_devices_down: u32,
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// List of allocated IRQs for each PCI slot.
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pci_irq_slots: [u8; 32],
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// Tree of devices, representing the dependencies between devices.
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// Useful for introspection, snapshot and restore.
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device_tree: Arc<Mutex<DeviceTree>>,
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@ -908,6 +895,120 @@ pub struct DeviceManager {
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restoring: bool,
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}
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struct PciSegment {
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id: u16,
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pci_bus: Arc<Mutex<PciBus>>,
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pci_config_mmio: Arc<Mutex<PciConfigMmio>>,
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mmio_config_address: u64,
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#[cfg(target_arch = "x86_64")]
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pci_config_io: Option<Arc<Mutex<PciConfigIo>>>,
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// Bitmap of PCI devices to hotplug.
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pci_devices_up: u32,
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// Bitmap of PCI devices to hotunplug.
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pci_devices_down: u32,
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// List of allocated IRQs for each PCI slot.
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pci_irq_slots: [u8; 32],
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}
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impl PciSegment {
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fn new_default_segment(
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address_manager: &Arc<AddressManager>,
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) -> DeviceManagerResult<PciSegment> {
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let pci_root = PciRoot::new(None);
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let pci_bus = Arc::new(Mutex::new(PciBus::new(
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pci_root,
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Arc::clone(address_manager) as Arc<dyn DeviceRelocation>,
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)));
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let pci_config_mmio = Arc::new(Mutex::new(PciConfigMmio::new(Arc::clone(&pci_bus))));
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address_manager
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.mmio_bus
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.insert(
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Arc::clone(&pci_config_mmio) as Arc<Mutex<dyn BusDevice>>,
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arch::layout::PCI_MMCONFIG_START.0,
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arch::layout::PCI_MMCONFIG_SIZE,
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)
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.map_err(DeviceManagerError::BusError)?;
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#[cfg(target_arch = "x86_64")]
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let pci_config_io = Arc::new(Mutex::new(PciConfigIo::new(Arc::clone(&pci_bus))));
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#[cfg(target_arch = "x86_64")]
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address_manager
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.io_bus
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.insert(
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pci_config_io.clone(),
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PCI_CONFIG_IO_PORT,
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PCI_CONFIG_IO_PORT_SIZE,
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)
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.map_err(DeviceManagerError::BusError)?;
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let mut segment = PciSegment {
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id: 0,
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pci_bus,
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pci_config_mmio,
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mmio_config_address: arch::layout::PCI_MMCONFIG_START.0,
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pci_devices_up: 0,
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pci_devices_down: 0,
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pci_irq_slots: [0; 32],
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#[cfg(target_arch = "x86_64")]
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pci_config_io: Some(pci_config_io),
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};
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// Reserve some IRQs for PCI devices in case they need to support INTx.
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segment.reserve_legacy_interrupts_for_pci_devices(address_manager)?;
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info!(
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"Adding PCI segment: id={}, PCI MMIO config address: 0x{:x}",
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segment.id, segment.mmio_config_address
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);
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Ok(segment)
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}
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fn next_device_bdf(&self) -> DeviceManagerResult<u32> {
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// We need to shift the device id since the 3 first bits
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// are dedicated to the PCI function, and we know we don't
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// do multifunction. Also, because we only support one PCI
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// bus, the bus 0, we don't need to add anything to the
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// global device ID.
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Ok(self
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.pci_bus
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.lock()
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.unwrap()
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.next_device_id()
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.map_err(DeviceManagerError::NextPciDeviceId)?
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<< 3)
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}
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fn reserve_legacy_interrupts_for_pci_devices(
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&mut self,
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address_manager: &Arc<AddressManager>,
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) -> DeviceManagerResult<()> {
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// Reserve 8 IRQs which will be shared across all PCI devices.
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let num_irqs = 8;
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let mut irqs: Vec<u8> = Vec::new();
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for _ in 0..num_irqs {
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irqs.push(
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address_manager
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.allocator
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.lock()
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.unwrap()
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.allocate_irq()
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.ok_or(DeviceManagerError::AllocateIrq)? as u8,
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);
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}
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// There are 32 devices on the PCI bus, let's assign them an IRQ.
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for i in 0..32 {
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self.pci_irq_slots[i] = irqs[(i % num_irqs) as usize];
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}
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Ok(())
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}
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}
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impl DeviceManager {
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#[allow(clippy::too_many_arguments)]
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pub fn new(
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@ -964,19 +1065,13 @@ impl DeviceManager {
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virtio_devices: Vec::new(),
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bus_devices: Vec::new(),
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device_id_cnt: Wrapping(0),
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pci_bus: None,
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#[cfg(target_arch = "x86_64")]
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// Create early so ready for use in `VmmOps`
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pci_config_io: Arc::new(Mutex::new(PciConfigIo::new())),
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msi_interrupt_manager,
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legacy_interrupt_manager: None,
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passthrough_device: None,
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vfio_container: None,
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iommu_device: None,
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iommu_attached_devices: None,
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pci_devices_up: 0,
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pci_devices_down: 0,
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pci_irq_slots: [0; 32],
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pci_segment: PciSegment::new_default_segment(&address_manager)?,
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device_tree,
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exit_evt: exit_evt.try_clone().map_err(DeviceManagerError::EventFd)?,
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reset_evt: reset_evt.try_clone().map_err(DeviceManagerError::EventFd)?,
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@ -1095,9 +1190,6 @@ impl DeviceManager {
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console_resize_pipe,
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)?;
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// Reserve some IRQs for PCI devices in case they need to support INTx.
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self.reserve_legacy_interrupts_for_pci_devices()?;
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self.legacy_interrupt_manager = Some(legacy_interrupt_manager);
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virtio_devices.append(&mut self.make_virtio_devices()?);
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@ -1109,29 +1201,6 @@ impl DeviceManager {
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Ok(())
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}
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fn reserve_legacy_interrupts_for_pci_devices(&mut self) -> DeviceManagerResult<()> {
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// Reserve 8 IRQs which will be shared across all PCI devices.
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let num_irqs = 8;
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let mut irqs: Vec<u8> = Vec::new();
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for _ in 0..num_irqs {
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irqs.push(
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self.address_manager
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.allocator
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.lock()
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.unwrap()
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.allocate_irq()
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.ok_or(DeviceManagerError::AllocateIrq)? as u8,
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);
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}
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// There are 32 devices on the PCI bus, let's assign them an IRQ.
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for i in 0..32 {
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self.pci_irq_slots[i] = irqs[(i % num_irqs) as usize];
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}
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Ok(())
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}
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fn state(&self) -> DeviceManagerState {
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DeviceManagerState {
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device_tree: self.device_tree.lock().unwrap().clone(),
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@ -1169,12 +1238,6 @@ impl DeviceManager {
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&mut self,
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virtio_devices: Vec<(VirtioDeviceArc, bool, String)>,
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) -> DeviceManagerResult<()> {
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let pci_root = PciRoot::new(None);
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let mut pci_bus = PciBus::new(
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pci_root,
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Arc::clone(&self.address_manager) as Arc<dyn DeviceRelocation>,
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);
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let iommu_id = String::from(IOMMU_DEVICE_NAME);
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let (iommu_device, iommu_mapping) = if self.config.lock().unwrap().iommu {
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@ -1204,7 +1267,7 @@ impl DeviceManager {
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};
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let mut iommu_attached_devices = Vec::new();
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{
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for (device, iommu_attached, id) in virtio_devices {
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let mapping: &Option<Arc<IommuMapping>> = if iommu_attached {
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&iommu_mapping
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@ -1212,55 +1275,32 @@ impl DeviceManager {
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&None
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};
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let dev_id = self.add_virtio_pci_device(device, &mut pci_bus, mapping, id)?;
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let dev_id = self.add_virtio_pci_device(device, mapping, id)?;
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if iommu_attached {
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iommu_attached_devices.push(dev_id);
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}
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}
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let mut vfio_iommu_device_ids = self.add_vfio_devices(&mut pci_bus)?;
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let mut vfio_iommu_device_ids = self.add_vfio_devices()?;
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iommu_attached_devices.append(&mut vfio_iommu_device_ids);
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let mut vfio_user_iommu_device_ids = self.add_user_devices(&mut pci_bus)?;
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let mut vfio_user_iommu_device_ids = self.add_user_devices()?;
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iommu_attached_devices.append(&mut vfio_user_iommu_device_ids);
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if let Some(iommu_device) = iommu_device {
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let dev_id = self.add_virtio_pci_device(iommu_device, &mut pci_bus, &None, iommu_id)?;
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let dev_id = self.add_virtio_pci_device(iommu_device, &None, iommu_id)?;
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self.iommu_attached_devices = Some((dev_id, iommu_attached_devices));
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}
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}
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let pci_bus = Arc::new(Mutex::new(pci_bus));
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#[cfg(target_arch = "x86_64")]
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self.pci_config_io
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.lock()
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.unwrap()
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.set_bus(Arc::clone(&pci_bus));
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#[cfg(target_arch = "x86_64")]
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self.bus_devices
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.push(Arc::clone(&self.pci_config_io) as Arc<Mutex<dyn BusDevice>>);
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#[cfg(target_arch = "x86_64")]
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self.address_manager
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.io_bus
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.insert(
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self.pci_config_io.clone(),
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PCI_CONFIG_IO_PORT,
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PCI_CONFIG_IO_PORT_SIZE,
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)
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.map_err(DeviceManagerError::BusError)?;
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let pci_config_mmio = Arc::new(Mutex::new(PciConfigMmio::new(Arc::clone(&pci_bus))));
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self.bus_devices
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.push(Arc::clone(&pci_config_mmio) as Arc<Mutex<dyn BusDevice>>);
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self.address_manager
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.mmio_bus
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.insert(
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pci_config_mmio,
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arch::layout::PCI_MMCONFIG_START.0,
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arch::layout::PCI_MMCONFIG_SIZE,
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)
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.map_err(DeviceManagerError::BusError)?;
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.push(Arc::clone(self.pci_segment.pci_config_io.as_ref().unwrap())
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as Arc<Mutex<dyn BusDevice>>);
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self.pci_bus = Some(pci_bus);
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self.bus_devices
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.push(Arc::clone(&self.pci_segment.pci_config_mmio) as Arc<Mutex<dyn BusDevice>>);
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Ok(())
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}
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@ -2819,7 +2859,6 @@ impl DeviceManager {
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fn add_passthrough_device(
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&mut self,
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pci: &mut PciBus,
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device_cfg: &mut DeviceConfig,
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) -> DeviceManagerResult<(u32, String)> {
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// If the passthrough device has not been created yet, it is created
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@ -2833,7 +2872,7 @@ impl DeviceManager {
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);
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}
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self.add_vfio_device(pci, device_cfg)
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self.add_vfio_device(device_cfg)
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}
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fn create_vfio_container(&self) -> DeviceManagerResult<Arc<VfioContainer>> {
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@ -2868,18 +2907,9 @@ impl DeviceManager {
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fn add_vfio_device(
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&mut self,
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pci: &mut PciBus,
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device_cfg: &mut DeviceConfig,
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) -> DeviceManagerResult<(u32, String)> {
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// We need to shift the device id since the 3 first bits
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// are dedicated to the PCI function, and we know we don't
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// do multifunction. Also, because we only support one PCI
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// bus, the bus 0, we don't need to add anything to the
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// global device ID.
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let pci_device_bdf = pci
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.next_device_id()
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.map_err(DeviceManagerError::NextPciDeviceId)?
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<< 3;
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let pci_device_bdf = self.pci_segment.next_device_bdf()?;
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let mut needs_dma_mapping = false;
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@ -2955,13 +2985,13 @@ impl DeviceManager {
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}
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}
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let legacy_interrupt_group = if let Some(legacy_interrupt_manager) =
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&self.legacy_interrupt_manager
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{
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let legacy_interrupt_group =
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if let Some(legacy_interrupt_manager) = &self.legacy_interrupt_manager {
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Some(
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legacy_interrupt_manager
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.create_group(LegacyIrqGroupConfig {
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irq: self.pci_irq_slots[(pci_device_bdf >> 3) as usize] as InterruptIndex,
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irq: self.pci_segment.pci_irq_slots[(pci_device_bdf >> 3) as usize]
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as InterruptIndex,
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})
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.map_err(DeviceManagerError::CreateInterruptGroup)?,
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)
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@ -3009,7 +3039,6 @@ impl DeviceManager {
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let vfio_pci_device = Arc::new(Mutex::new(vfio_pci_device));
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self.add_pci_device(
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pci,
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vfio_pci_device.clone(),
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vfio_pci_device.clone(),
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pci_device_bdf,
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@ -3028,7 +3057,6 @@ impl DeviceManager {
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fn add_pci_device(
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&mut self,
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pci_bus: &mut PciBus,
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bus_device: Arc<Mutex<dyn BusDevice>>,
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pci_device: Arc<Mutex<dyn PciDevice>>,
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bdf: u32,
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@ -3039,6 +3067,8 @@ impl DeviceManager {
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.allocate_bars(&mut self.address_manager.allocator.lock().unwrap())
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.map_err(DeviceManagerError::AllocateBars)?;
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let mut pci_bus = self.pci_segment.pci_bus.lock().unwrap();
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pci_bus
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.add_device(bdf, pci_device)
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.map_err(DeviceManagerError::AddPciDevice)?;
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@ -3058,13 +3088,13 @@ impl DeviceManager {
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Ok(bars)
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}
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fn add_vfio_devices(&mut self, pci: &mut PciBus) -> DeviceManagerResult<Vec<u32>> {
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fn add_vfio_devices(&mut self) -> DeviceManagerResult<Vec<u32>> {
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let mut iommu_attached_device_ids = Vec::new();
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let mut devices = self.config.lock().unwrap().devices.clone();
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if let Some(device_list_cfg) = &mut devices {
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for device_cfg in device_list_cfg.iter_mut() {
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let (device_id, _) = self.add_passthrough_device(pci, device_cfg)?;
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let (device_id, _) = self.add_passthrough_device(device_cfg)?;
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if device_cfg.iommu && self.iommu_device.is_some() {
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iommu_attached_device_ids.push(device_id);
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}
|
||||
@ -3079,21 +3109,17 @@ impl DeviceManager {
|
||||
|
||||
fn add_vfio_user_device(
|
||||
&mut self,
|
||||
pci: &mut PciBus,
|
||||
device_cfg: &mut UserDeviceConfig,
|
||||
) -> DeviceManagerResult<(u32, String)> {
|
||||
let pci_device_bdf = pci
|
||||
.next_device_id()
|
||||
.map_err(DeviceManagerError::NextPciDeviceId)?
|
||||
<< 3;
|
||||
let pci_device_bdf = self.pci_segment.next_device_bdf()?;
|
||||
|
||||
let legacy_interrupt_group = if let Some(legacy_interrupt_manager) =
|
||||
&self.legacy_interrupt_manager
|
||||
{
|
||||
let legacy_interrupt_group =
|
||||
if let Some(legacy_interrupt_manager) = &self.legacy_interrupt_manager {
|
||||
Some(
|
||||
legacy_interrupt_manager
|
||||
.create_group(LegacyIrqGroupConfig {
|
||||
irq: self.pci_irq_slots[(pci_device_bdf >> 3) as usize] as InterruptIndex,
|
||||
irq: self.pci_segment.pci_irq_slots[(pci_device_bdf >> 3) as usize]
|
||||
as InterruptIndex,
|
||||
})
|
||||
.map_err(DeviceManagerError::CreateInterruptGroup)?,
|
||||
)
|
||||
@ -3156,7 +3182,6 @@ impl DeviceManager {
|
||||
};
|
||||
|
||||
self.add_pci_device(
|
||||
pci,
|
||||
vfio_user_pci_device.clone(),
|
||||
vfio_user_pci_device.clone(),
|
||||
pci_device_bdf,
|
||||
@ -3175,12 +3200,12 @@ impl DeviceManager {
|
||||
Ok((pci_device_bdf, vfio_user_name))
|
||||
}
|
||||
|
||||
fn add_user_devices(&mut self, pci: &mut PciBus) -> DeviceManagerResult<Vec<u32>> {
|
||||
fn add_user_devices(&mut self) -> DeviceManagerResult<Vec<u32>> {
|
||||
let mut user_devices = self.config.lock().unwrap().user_devices.clone();
|
||||
|
||||
if let Some(device_list_cfg) = &mut user_devices {
|
||||
for device_cfg in device_list_cfg.iter_mut() {
|
||||
let (_device_id, _id) = self.add_vfio_user_device(pci, device_cfg)?;
|
||||
let (_device_id, _id) = self.add_vfio_user_device(device_cfg)?;
|
||||
}
|
||||
}
|
||||
|
||||
@ -3193,7 +3218,6 @@ impl DeviceManager {
|
||||
fn add_virtio_pci_device(
|
||||
&mut self,
|
||||
virtio_device: VirtioDeviceArc,
|
||||
pci: &mut PciBus,
|
||||
iommu_mapping: &Option<Arc<IommuMapping>>,
|
||||
virtio_device_id: String,
|
||||
) -> DeviceManagerResult<u32> {
|
||||
@ -3212,7 +3236,11 @@ impl DeviceManager {
|
||||
.pci_bdf
|
||||
.ok_or(DeviceManagerError::MissingDeviceNodePciBdf)?;
|
||||
|
||||
pci.get_device_id((pci_device_bdf >> 3) as usize)
|
||||
self.pci_segment
|
||||
.pci_bus
|
||||
.lock()
|
||||
.unwrap()
|
||||
.get_device_id((pci_device_bdf >> 3) as usize)
|
||||
.map_err(DeviceManagerError::GetPciDeviceId)?;
|
||||
|
||||
if node.resources.is_empty() {
|
||||
@ -3231,14 +3259,7 @@ impl DeviceManager {
|
||||
|
||||
(pci_device_bdf, config_bar_addr)
|
||||
} else {
|
||||
// We need to shift the device id since the 3 first bits are dedicated
|
||||
// to the PCI function, and we know we don't do multifunction.
|
||||
// Also, because we only support one PCI bus, the bus 0, we don't need
|
||||
// to add anything to the global device ID.
|
||||
let pci_device_bdf = pci
|
||||
.next_device_id()
|
||||
.map_err(DeviceManagerError::NextPciDeviceId)?
|
||||
<< 3;
|
||||
let pci_device_bdf = self.pci_segment.next_device_bdf()?;
|
||||
|
||||
(pci_device_bdf, None)
|
||||
};
|
||||
@ -3299,7 +3320,6 @@ impl DeviceManager {
|
||||
|
||||
let virtio_pci_device = Arc::new(Mutex::new(virtio_pci_device));
|
||||
let bars = self.add_pci_device(
|
||||
pci,
|
||||
virtio_pci_device.clone(),
|
||||
virtio_pci_device.clone(),
|
||||
pci_device_bdf,
|
||||
@ -3351,7 +3371,7 @@ impl DeviceManager {
|
||||
#[cfg(target_arch = "x86_64")]
|
||||
// Used to provide a fast path for handling PIO exits
|
||||
pub fn pci_config_io(&self) -> Arc<Mutex<PciConfigIo>> {
|
||||
self.pci_config_io.clone()
|
||||
Arc::clone(self.pci_segment.pci_config_io.as_ref().unwrap())
|
||||
}
|
||||
|
||||
pub fn console(&self) -> &Arc<Console> {
|
||||
@ -3444,17 +3464,10 @@ impl DeviceManager {
|
||||
&mut self,
|
||||
device_cfg: &mut DeviceConfig,
|
||||
) -> DeviceManagerResult<PciDeviceInfo> {
|
||||
let pci = if let Some(pci_bus) = &self.pci_bus {
|
||||
Arc::clone(pci_bus)
|
||||
} else {
|
||||
return Err(DeviceManagerError::NoPciBus);
|
||||
};
|
||||
|
||||
let (device_id, device_name) =
|
||||
self.add_passthrough_device(&mut pci.lock().unwrap(), device_cfg)?;
|
||||
let (device_id, device_name) = self.add_passthrough_device(device_cfg)?;
|
||||
|
||||
// Update the PCIU bitmap
|
||||
self.pci_devices_up |= 1 << (device_id >> 3);
|
||||
self.pci_segment.pci_devices_up |= 1 << (device_id >> 3);
|
||||
|
||||
Ok(PciDeviceInfo {
|
||||
id: device_name,
|
||||
@ -3466,17 +3479,10 @@ impl DeviceManager {
|
||||
&mut self,
|
||||
device_cfg: &mut UserDeviceConfig,
|
||||
) -> DeviceManagerResult<PciDeviceInfo> {
|
||||
let pci = if let Some(pci_bus) = &self.pci_bus {
|
||||
Arc::clone(pci_bus)
|
||||
} else {
|
||||
return Err(DeviceManagerError::NoPciBus);
|
||||
};
|
||||
|
||||
let (device_id, device_name) =
|
||||
self.add_vfio_user_device(&mut pci.lock().unwrap(), device_cfg)?;
|
||||
let (device_id, device_name) = self.add_vfio_user_device(device_cfg)?;
|
||||
|
||||
// Update the PCIU bitmap
|
||||
self.pci_devices_up |= 1 << (device_id >> 3);
|
||||
self.pci_segment.pci_devices_up |= 1 << (device_id >> 3);
|
||||
|
||||
Ok(PciDeviceInfo {
|
||||
id: device_name,
|
||||
@ -3535,24 +3541,19 @@ impl DeviceManager {
|
||||
}
|
||||
|
||||
// Update the PCID bitmap
|
||||
self.pci_devices_down |= 1 << (pci_device_bdf >> 3);
|
||||
self.pci_segment.pci_devices_down |= 1 << (pci_device_bdf >> 3);
|
||||
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub fn eject_device(&mut self, device_id: u8) -> DeviceManagerResult<()> {
|
||||
// Retrieve the PCI bus.
|
||||
let pci = if let Some(pci_bus) = &self.pci_bus {
|
||||
Arc::clone(pci_bus)
|
||||
} else {
|
||||
return Err(DeviceManagerError::NoPciBus);
|
||||
};
|
||||
|
||||
// Convert the device ID into the corresponding b/d/f.
|
||||
let pci_device_bdf = (device_id as u32) << 3;
|
||||
|
||||
// Give the PCI device ID back to the PCI bus.
|
||||
pci.lock()
|
||||
self.pci_segment
|
||||
.pci_bus
|
||||
.lock()
|
||||
.unwrap()
|
||||
.put_device_id(device_id as usize)
|
||||
.map_err(DeviceManagerError::PutPciDeviceId)?;
|
||||
@ -3625,7 +3626,9 @@ impl DeviceManager {
|
||||
.map_err(DeviceManagerError::FreePciBars)?;
|
||||
|
||||
// Remove the device from the PCI bus
|
||||
pci.lock()
|
||||
self.pci_segment
|
||||
.pci_bus
|
||||
.lock()
|
||||
.unwrap()
|
||||
.remove_by_device(&pci_device)
|
||||
.map_err(DeviceManagerError::RemoveDeviceFromPciBus)?;
|
||||
@ -3685,23 +3688,16 @@ impl DeviceManager {
|
||||
warn!("Placing device behind vIOMMU is not available for hotplugged devices");
|
||||
}
|
||||
|
||||
let pci = if let Some(pci_bus) = &self.pci_bus {
|
||||
Arc::clone(pci_bus)
|
||||
} else {
|
||||
return Err(DeviceManagerError::NoPciBus);
|
||||
};
|
||||
|
||||
// Add the virtio device to the device manager list. This is important
|
||||
// as the list is used to notify virtio devices about memory updates
|
||||
// for instance.
|
||||
self.virtio_devices
|
||||
.push((device.clone(), iommu_attached, id.clone()));
|
||||
|
||||
let device_id =
|
||||
self.add_virtio_pci_device(device, &mut pci.lock().unwrap(), &None, id.clone())?;
|
||||
let device_id = self.add_virtio_pci_device(device, &None, id.clone())?;
|
||||
|
||||
// Update the PCIU bitmap
|
||||
self.pci_devices_up |= 1 << (device_id >> 3);
|
||||
self.pci_segment.pci_devices_up |= 1 << (device_id >> 3);
|
||||
|
||||
Ok(PciDeviceInfo { id, bdf: device_id })
|
||||
}
|
||||
@ -4171,6 +4167,7 @@ impl Aml for DeviceManager {
|
||||
|
||||
// Build PCI routing table, listing IRQs assigned to PCI devices.
|
||||
let prt_package_list: Vec<(u32, u32)> = self
|
||||
.pci_segment
|
||||
.pci_irq_slots
|
||||
.iter()
|
||||
.enumerate()
|
||||
@ -4424,15 +4421,15 @@ impl BusDevice for DeviceManager {
|
||||
match offset {
|
||||
PCIU_FIELD_OFFSET => {
|
||||
assert!(data.len() == PCIU_FIELD_SIZE);
|
||||
data.copy_from_slice(&self.pci_devices_up.to_le_bytes());
|
||||
data.copy_from_slice(&self.pci_segment.pci_devices_up.to_le_bytes());
|
||||
// Clear the PCIU bitmap
|
||||
self.pci_devices_up = 0;
|
||||
self.pci_segment.pci_devices_up = 0;
|
||||
}
|
||||
PCID_FIELD_OFFSET => {
|
||||
assert!(data.len() == PCID_FIELD_SIZE);
|
||||
data.copy_from_slice(&self.pci_devices_down.to_le_bytes());
|
||||
data.copy_from_slice(&self.pci_segment.pci_devices_down.to_le_bytes());
|
||||
// Clear the PCID bitmap
|
||||
self.pci_devices_down = 0;
|
||||
self.pci_segment.pci_devices_down = 0;
|
||||
}
|
||||
B0EJ_FIELD_OFFSET => {
|
||||
assert!(data.len() == B0EJ_FIELD_SIZE);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user