mirror of
https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2024-06-30 23:12:36 +00:00
vmm: Port MemoryManager to Aml::append_aml_bytes()
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
This commit is contained in:
Rob Bradford
parent
e04cbb2ad4
commit
185f0c1bf3
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@ -1783,13 +1783,13 @@ struct MemoryNotify {
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#[cfg(feature = "acpi")]
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impl Aml for MemoryNotify {
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fn to_aml_bytes(&self) -> Vec<u8> {
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fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
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let object = aml::Path::new(&format!("M{:03}", self.slot_id));
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aml::If::new(
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&aml::Equal::new(&aml::Arg(0), &self.slot_id),
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vec![&aml::Notify::new(&object, &aml::Arg(1))],
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)
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.to_aml_bytes()
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.append_aml_bytes(bytes)
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}
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}
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@ -1800,7 +1800,7 @@ struct MemorySlot {
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#[cfg(feature = "acpi")]
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impl Aml for MemorySlot {
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fn to_aml_bytes(&self) -> Vec<u8> {
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fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
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aml::Device::new(
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format!("M{:03}", self.slot_id).as_str().into(),
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vec![
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@ -1838,7 +1838,7 @@ impl Aml for MemorySlot {
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),
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],
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)
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.to_aml_bytes()
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.append_aml_bytes(bytes)
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}
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}
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@ -1849,14 +1849,10 @@ struct MemorySlots {
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#[cfg(feature = "acpi")]
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impl Aml for MemorySlots {
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fn to_aml_bytes(&self) -> Vec<u8> {
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let mut bytes = Vec::new();
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fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
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for slot_id in 0..self.slots {
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bytes.extend_from_slice(&MemorySlot { slot_id }.to_aml_bytes());
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MemorySlot { slot_id }.append_aml_bytes(bytes);
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}
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bytes
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}
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}
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@ -1867,8 +1863,7 @@ struct MemoryMethods {
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#[cfg(feature = "acpi")]
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impl Aml for MemoryMethods {
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fn to_aml_bytes(&self) -> Vec<u8> {
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let mut bytes = Vec::new();
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fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
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// Add "MTFY" notification method
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let mut memory_notifies = Vec::new();
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for slot_id in 0..self.slots {
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@ -1880,239 +1875,213 @@ impl Aml for MemoryMethods {
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memory_notifies_refs.push(memory_notifier);
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}
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bytes.extend_from_slice(
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&aml::Method::new("MTFY".into(), 2, true, memory_notifies_refs).to_aml_bytes(),
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);
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aml::Method::new("MTFY".into(), 2, true, memory_notifies_refs).append_aml_bytes(bytes);
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// MSCN method
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bytes.extend_from_slice(
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&aml::Method::new(
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"MSCN".into(),
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0,
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true,
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vec![
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// Take lock defined above
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&aml::Acquire::new("MLCK".into(), 0xffff),
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&aml::Store::new(&aml::Local(0), &aml::ZERO),
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&aml::While::new(
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&aml::LessThan::new(&aml::Local(0), &self.slots),
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vec![
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// Write slot number (in first argument) to I/O port via field
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&aml::Store::new(&aml::Path::new("\\_SB_.MHPC.MSEL"), &aml::Local(0)),
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// Check if MINS bit is set (inserting)
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&aml::If::new(
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&aml::Equal::new(&aml::Path::new("\\_SB_.MHPC.MINS"), &aml::ONE),
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// Notify device if it is
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vec![
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&aml::MethodCall::new(
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"MTFY".into(),
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vec![&aml::Local(0), &aml::ONE],
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),
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// Reset MINS bit
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&aml::Store::new(
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&aml::Path::new("\\_SB_.MHPC.MINS"),
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&aml::ONE,
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),
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],
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),
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// Check if MRMV bit is set
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&aml::If::new(
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&aml::Equal::new(&aml::Path::new("\\_SB_.MHPC.MRMV"), &aml::ONE),
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// Notify device if it is (with the eject constant 0x3)
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vec![
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&aml::MethodCall::new(
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"MTFY".into(),
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vec![&aml::Local(0), &3u8],
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),
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// Reset MRMV bit
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&aml::Store::new(
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&aml::Path::new("\\_SB_.MHPC.MRMV"),
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&aml::ONE,
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),
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],
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),
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&aml::Add::new(&aml::Local(0), &aml::Local(0), &aml::ONE),
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],
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),
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// Release lock
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&aml::Release::new("MLCK".into()),
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],
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)
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.to_aml_bytes(),
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);
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aml::Method::new(
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"MSCN".into(),
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0,
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true,
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vec![
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// Take lock defined above
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&aml::Acquire::new("MLCK".into(), 0xffff),
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&aml::Store::new(&aml::Local(0), &aml::ZERO),
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&aml::While::new(
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&aml::LessThan::new(&aml::Local(0), &self.slots),
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vec![
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// Write slot number (in first argument) to I/O port via field
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&aml::Store::new(&aml::Path::new("\\_SB_.MHPC.MSEL"), &aml::Local(0)),
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// Check if MINS bit is set (inserting)
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&aml::If::new(
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&aml::Equal::new(&aml::Path::new("\\_SB_.MHPC.MINS"), &aml::ONE),
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// Notify device if it is
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vec![
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&aml::MethodCall::new(
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"MTFY".into(),
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vec![&aml::Local(0), &aml::ONE],
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),
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// Reset MINS bit
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&aml::Store::new(&aml::Path::new("\\_SB_.MHPC.MINS"), &aml::ONE),
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],
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),
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// Check if MRMV bit is set
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&aml::If::new(
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&aml::Equal::new(&aml::Path::new("\\_SB_.MHPC.MRMV"), &aml::ONE),
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// Notify device if it is (with the eject constant 0x3)
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vec![
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&aml::MethodCall::new("MTFY".into(), vec![&aml::Local(0), &3u8]),
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// Reset MRMV bit
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&aml::Store::new(&aml::Path::new("\\_SB_.MHPC.MRMV"), &aml::ONE),
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],
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),
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&aml::Add::new(&aml::Local(0), &aml::Local(0), &aml::ONE),
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],
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),
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// Release lock
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&aml::Release::new("MLCK".into()),
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],
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)
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.append_aml_bytes(bytes);
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bytes.extend_from_slice(
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// Memory status method
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&aml::Method::new(
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"MSTA".into(),
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1,
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true,
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vec![
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// Take lock defined above
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&aml::Acquire::new("MLCK".into(), 0xffff),
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// Write slot number (in first argument) to I/O port via field
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&aml::Store::new(&aml::Path::new("\\_SB_.MHPC.MSEL"), &aml::Arg(0)),
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&aml::Store::new(&aml::Local(0), &aml::ZERO),
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// Check if MEN_ bit is set, if so make the local variable 0xf (see _STA for details of meaning)
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&aml::If::new(
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&aml::Equal::new(&aml::Path::new("\\_SB_.MHPC.MEN_"), &aml::ONE),
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vec![&aml::Store::new(&aml::Local(0), &0xfu8)],
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),
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// Release lock
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&aml::Release::new("MLCK".into()),
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// Return 0 or 0xf
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&aml::Return::new(&aml::Local(0)),
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],
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)
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.to_aml_bytes(),
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);
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// Memory status method
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aml::Method::new(
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"MSTA".into(),
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1,
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true,
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vec![
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// Take lock defined above
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&aml::Acquire::new("MLCK".into(), 0xffff),
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// Write slot number (in first argument) to I/O port via field
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&aml::Store::new(&aml::Path::new("\\_SB_.MHPC.MSEL"), &aml::Arg(0)),
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&aml::Store::new(&aml::Local(0), &aml::ZERO),
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// Check if MEN_ bit is set, if so make the local variable 0xf (see _STA for details of meaning)
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&aml::If::new(
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&aml::Equal::new(&aml::Path::new("\\_SB_.MHPC.MEN_"), &aml::ONE),
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vec![&aml::Store::new(&aml::Local(0), &0xfu8)],
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),
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// Release lock
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&aml::Release::new("MLCK".into()),
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// Return 0 or 0xf
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&aml::Return::new(&aml::Local(0)),
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],
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)
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.append_aml_bytes(bytes);
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bytes.extend_from_slice(
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// Memory range method
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&aml::Method::new(
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"MCRS".into(),
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1,
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true,
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vec![
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// Take lock defined above
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&aml::Acquire::new("MLCK".into(), 0xffff),
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// Write slot number (in first argument) to I/O port via field
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&aml::Store::new(&aml::Path::new("\\_SB_.MHPC.MSEL"), &aml::Arg(0)),
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&aml::Name::new(
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"MR64".into(),
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&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
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aml::AddressSpaceCachable::Cacheable,
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true,
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0x0000_0000_0000_0000u64,
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0xFFFF_FFFF_FFFF_FFFEu64,
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)]),
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),
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&aml::CreateField::<u64>::new(&aml::Path::new("MR64"), &14usize, "MINL".into()),
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&aml::CreateField::<u32>::new(&aml::Path::new("MR64"), &18usize, "MINH".into()),
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&aml::CreateField::<u64>::new(&aml::Path::new("MR64"), &22usize, "MAXL".into()),
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&aml::CreateField::<u32>::new(&aml::Path::new("MR64"), &26usize, "MAXH".into()),
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&aml::CreateField::<u64>::new(&aml::Path::new("MR64"), &38usize, "LENL".into()),
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&aml::CreateField::<u32>::new(&aml::Path::new("MR64"), &42usize, "LENH".into()),
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&aml::Store::new(&aml::Path::new("MINL"), &aml::Path::new("\\_SB_.MHPC.MHBL")),
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&aml::Store::new(&aml::Path::new("MINH"), &aml::Path::new("\\_SB_.MHPC.MHBH")),
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&aml::Store::new(&aml::Path::new("LENL"), &aml::Path::new("\\_SB_.MHPC.MHLL")),
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&aml::Store::new(&aml::Path::new("LENH"), &aml::Path::new("\\_SB_.MHPC.MHLH")),
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&aml::Add::new(
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&aml::Path::new("MAXL"),
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&aml::Path::new("MINL"),
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&aml::Path::new("LENL"),
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),
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&aml::Add::new(
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// Memory range method
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aml::Method::new(
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"MCRS".into(),
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1,
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true,
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vec![
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// Take lock defined above
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&aml::Acquire::new("MLCK".into(), 0xffff),
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// Write slot number (in first argument) to I/O port via field
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&aml::Store::new(&aml::Path::new("\\_SB_.MHPC.MSEL"), &aml::Arg(0)),
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&aml::Name::new(
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"MR64".into(),
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&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
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aml::AddressSpaceCachable::Cacheable,
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true,
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0x0000_0000_0000_0000u64,
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0xFFFF_FFFF_FFFF_FFFEu64,
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)]),
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),
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&aml::CreateField::<u64>::new(&aml::Path::new("MR64"), &14usize, "MINL".into()),
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&aml::CreateField::<u32>::new(&aml::Path::new("MR64"), &18usize, "MINH".into()),
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&aml::CreateField::<u64>::new(&aml::Path::new("MR64"), &22usize, "MAXL".into()),
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&aml::CreateField::<u32>::new(&aml::Path::new("MR64"), &26usize, "MAXH".into()),
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&aml::CreateField::<u64>::new(&aml::Path::new("MR64"), &38usize, "LENL".into()),
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&aml::CreateField::<u32>::new(&aml::Path::new("MR64"), &42usize, "LENH".into()),
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&aml::Store::new(&aml::Path::new("MINL"), &aml::Path::new("\\_SB_.MHPC.MHBL")),
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&aml::Store::new(&aml::Path::new("MINH"), &aml::Path::new("\\_SB_.MHPC.MHBH")),
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&aml::Store::new(&aml::Path::new("LENL"), &aml::Path::new("\\_SB_.MHPC.MHLL")),
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&aml::Store::new(&aml::Path::new("LENH"), &aml::Path::new("\\_SB_.MHPC.MHLH")),
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&aml::Add::new(
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&aml::Path::new("MAXL"),
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&aml::Path::new("MINL"),
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&aml::Path::new("LENL"),
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),
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&aml::Add::new(
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&aml::Path::new("MAXH"),
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&aml::Path::new("MINH"),
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&aml::Path::new("LENH"),
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),
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&aml::If::new(
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&aml::LessThan::new(&aml::Path::new("MAXL"), &aml::Path::new("MINL")),
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vec![&aml::Add::new(
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&aml::Path::new("MAXH"),
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&aml::Path::new("MINH"),
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&aml::Path::new("LENH"),
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),
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&aml::If::new(
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&aml::LessThan::new(&aml::Path::new("MAXL"), &aml::Path::new("MINL")),
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vec![&aml::Add::new(
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&aml::Path::new("MAXH"),
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&aml::ONE,
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&aml::Path::new("MAXH"),
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)],
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),
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&aml::Subtract::new(
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&aml::Path::new("MAXL"),
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&aml::Path::new("MAXL"),
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&aml::ONE,
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),
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// Release lock
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&aml::Release::new("MLCK".into()),
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&aml::Return::new(&aml::Path::new("MR64")),
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],
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)
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.to_aml_bytes(),
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);
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bytes
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&aml::Path::new("MAXH"),
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)],
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),
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&aml::Subtract::new(&aml::Path::new("MAXL"), &aml::Path::new("MAXL"), &aml::ONE),
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// Release lock
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&aml::Release::new("MLCK".into()),
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&aml::Return::new(&aml::Path::new("MR64")),
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],
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)
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.append_aml_bytes(bytes)
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}
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}
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#[cfg(feature = "acpi")]
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impl Aml for MemoryManager {
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fn to_aml_bytes(&self) -> Vec<u8> {
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let mut bytes = Vec::new();
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fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
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// Memory Hotplug Controller
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bytes.extend_from_slice(
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&aml::Device::new(
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"_SB_.MHPC".into(),
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vec![
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&aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0A06")),
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&aml::Name::new("_UID".into(), &"Memory Hotplug Controller"),
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// Mutex to protect concurrent access as we write to choose slot and then read back status
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&aml::Mutex::new("MLCK".into(), 0),
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&aml::Name::new(
|
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"_CRS".into(),
|
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&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
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aml::AddressSpaceCachable::NotCacheable,
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true,
|
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self.acpi_address.0 as u64,
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self.acpi_address.0 + MEMORY_MANAGER_ACPI_SIZE as u64 - 1,
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)]),
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),
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// OpRegion and Fields map MMIO range into individual field values
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&aml::OpRegion::new(
|
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"MHPR".into(),
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aml::OpRegionSpace::SystemMemory,
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self.acpi_address.0 as usize,
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MEMORY_MANAGER_ACPI_SIZE,
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),
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&aml::Field::new(
|
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"MHPR".into(),
|
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aml::FieldAccessType::DWord,
|
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aml::FieldUpdateRule::Preserve,
|
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vec![
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aml::FieldEntry::Named(*b"MHBL", 32), // Base (low 4 bytes)
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aml::FieldEntry::Named(*b"MHBH", 32), // Base (high 4 bytes)
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aml::FieldEntry::Named(*b"MHLL", 32), // Length (low 4 bytes)
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aml::FieldEntry::Named(*b"MHLH", 32), // Length (high 4 bytes)
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],
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),
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&aml::Field::new(
|
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"MHPR".into(),
|
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aml::FieldAccessType::DWord,
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aml::FieldUpdateRule::Preserve,
|
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vec![
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aml::FieldEntry::Reserved(128),
|
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aml::FieldEntry::Named(*b"MHPX", 32), // PXM
|
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],
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),
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&aml::Field::new(
|
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"MHPR".into(),
|
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aml::FieldAccessType::Byte,
|
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aml::FieldUpdateRule::WriteAsZeroes,
|
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vec![
|
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aml::FieldEntry::Reserved(160),
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aml::FieldEntry::Named(*b"MEN_", 1), // Enabled
|
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aml::FieldEntry::Named(*b"MINS", 1), // Inserting
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aml::FieldEntry::Named(*b"MRMV", 1), // Removing
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aml::FieldEntry::Named(*b"MEJ0", 1), // Ejecting
|
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],
|
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),
|
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&aml::Field::new(
|
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"MHPR".into(),
|
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aml::FieldAccessType::DWord,
|
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aml::FieldUpdateRule::Preserve,
|
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vec![
|
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aml::FieldEntry::Named(*b"MSEL", 32), // Selector
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aml::FieldEntry::Named(*b"MOEV", 32), // Event
|
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aml::FieldEntry::Named(*b"MOSC", 32), // OSC
|
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],
|
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),
|
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&MemoryMethods {
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slots: self.hotplug_slots.len(),
|
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},
|
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&MemorySlots {
|
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slots: self.hotplug_slots.len(),
|
||||
},
|
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],
|
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)
|
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.to_aml_bytes(),
|
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);
|
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aml::Device::new(
|
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"_SB_.MHPC".into(),
|
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vec![
|
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&aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0A06")),
|
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&aml::Name::new("_UID".into(), &"Memory Hotplug Controller"),
|
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// Mutex to protect concurrent access as we write to choose slot and then read back status
|
||||
&aml::Mutex::new("MLCK".into(), 0),
|
||||
&aml::Name::new(
|
||||
"_CRS".into(),
|
||||
&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
|
||||
aml::AddressSpaceCachable::NotCacheable,
|
||||
true,
|
||||
self.acpi_address.0 as u64,
|
||||
self.acpi_address.0 + MEMORY_MANAGER_ACPI_SIZE as u64 - 1,
|
||||
)]),
|
||||
),
|
||||
// OpRegion and Fields map MMIO range into individual field values
|
||||
&aml::OpRegion::new(
|
||||
"MHPR".into(),
|
||||
aml::OpRegionSpace::SystemMemory,
|
||||
self.acpi_address.0 as usize,
|
||||
MEMORY_MANAGER_ACPI_SIZE,
|
||||
),
|
||||
&aml::Field::new(
|
||||
"MHPR".into(),
|
||||
aml::FieldAccessType::DWord,
|
||||
aml::FieldUpdateRule::Preserve,
|
||||
vec![
|
||||
aml::FieldEntry::Named(*b"MHBL", 32), // Base (low 4 bytes)
|
||||
aml::FieldEntry::Named(*b"MHBH", 32), // Base (high 4 bytes)
|
||||
aml::FieldEntry::Named(*b"MHLL", 32), // Length (low 4 bytes)
|
||||
aml::FieldEntry::Named(*b"MHLH", 32), // Length (high 4 bytes)
|
||||
],
|
||||
),
|
||||
&aml::Field::new(
|
||||
"MHPR".into(),
|
||||
aml::FieldAccessType::DWord,
|
||||
aml::FieldUpdateRule::Preserve,
|
||||
vec![
|
||||
aml::FieldEntry::Reserved(128),
|
||||
aml::FieldEntry::Named(*b"MHPX", 32), // PXM
|
||||
],
|
||||
),
|
||||
&aml::Field::new(
|
||||
"MHPR".into(),
|
||||
aml::FieldAccessType::Byte,
|
||||
aml::FieldUpdateRule::WriteAsZeroes,
|
||||
vec![
|
||||
aml::FieldEntry::Reserved(160),
|
||||
aml::FieldEntry::Named(*b"MEN_", 1), // Enabled
|
||||
aml::FieldEntry::Named(*b"MINS", 1), // Inserting
|
||||
aml::FieldEntry::Named(*b"MRMV", 1), // Removing
|
||||
aml::FieldEntry::Named(*b"MEJ0", 1), // Ejecting
|
||||
],
|
||||
),
|
||||
&aml::Field::new(
|
||||
"MHPR".into(),
|
||||
aml::FieldAccessType::DWord,
|
||||
aml::FieldUpdateRule::Preserve,
|
||||
vec![
|
||||
aml::FieldEntry::Named(*b"MSEL", 32), // Selector
|
||||
aml::FieldEntry::Named(*b"MOEV", 32), // Event
|
||||
aml::FieldEntry::Named(*b"MOSC", 32), // OSC
|
||||
],
|
||||
),
|
||||
&MemoryMethods {
|
||||
slots: self.hotplug_slots.len(),
|
||||
},
|
||||
&MemorySlots {
|
||||
slots: self.hotplug_slots.len(),
|
||||
},
|
||||
],
|
||||
)
|
||||
.append_aml_bytes(bytes);
|
||||
|
||||
#[cfg(target_arch = "x86_64")]
|
||||
{
|
||||
|
|
@ -2120,35 +2089,26 @@ impl Aml for MemoryManager {
|
|||
let min = sgx_epc_region.start().raw_value() as u64;
|
||||
let max = min + sgx_epc_region.size() as u64 - 1;
|
||||
// SGX EPC region
|
||||
bytes.extend_from_slice(
|
||||
&aml::Device::new(
|
||||
"_SB_.EPC_".into(),
|
||||
vec![
|
||||
&aml::Name::new("_HID".into(), &aml::EisaName::new("INT0E0C")),
|
||||
// QWORD describing the EPC region start and size
|
||||
&aml::Name::new(
|
||||
"_CRS".into(),
|
||||
&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
|
||||
aml::AddressSpaceCachable::NotCacheable,
|
||||
true,
|
||||
min,
|
||||
max,
|
||||
)]),
|
||||
),
|
||||
&aml::Method::new(
|
||||
"_STA".into(),
|
||||
0,
|
||||
false,
|
||||
vec![&aml::Return::new(&0xfu8)],
|
||||
),
|
||||
],
|
||||
)
|
||||
.to_aml_bytes(),
|
||||
);
|
||||
aml::Device::new(
|
||||
"_SB_.EPC_".into(),
|
||||
vec![
|
||||
&aml::Name::new("_HID".into(), &aml::EisaName::new("INT0E0C")),
|
||||
// QWORD describing the EPC region start and size
|
||||
&aml::Name::new(
|
||||
"_CRS".into(),
|
||||
&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
|
||||
aml::AddressSpaceCachable::NotCacheable,
|
||||
true,
|
||||
min,
|
||||
max,
|
||||
)]),
|
||||
),
|
||||
&aml::Method::new("_STA".into(), 0, false, vec![&aml::Return::new(&0xfu8)]),
|
||||
],
|
||||
)
|
||||
.append_aml_bytes(bytes);
|
||||
}
|
||||
}
|
||||
|
||||
bytes
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user