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https://github.com/cloud-hypervisor/cloud-hypervisor.git
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msix: Remove the need for interrupt callback
Now that MsixConfig has access to the irq_fd descriptors associated with each vector, it can directly write to it anytime it needs to trigger an interrupt. Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
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@ -8,8 +8,7 @@ extern crate vm_memory;
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use std::sync::Arc;
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use std::sync::Arc;
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use crate::device::InterruptParameters;
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use crate::{set_kvm_routes, InterruptRoute, PciCapability, PciCapabilityID};
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use crate::{set_kvm_routes, InterruptDelivery, InterruptRoute, PciCapability, PciCapabilityID};
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use byteorder::{ByteOrder, LittleEndian};
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use byteorder::{ByteOrder, LittleEndian};
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use kvm_bindings::{kvm_irq_routing_entry, KVM_IRQ_ROUTING_MSI};
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use kvm_bindings::{kvm_irq_routing_entry, KVM_IRQ_ROUTING_MSI};
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use kvm_ioctls::VmFd;
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use kvm_ioctls::VmFd;
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@ -59,7 +58,6 @@ pub struct MsixConfig {
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pub irq_routes: Vec<InterruptRoute>,
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pub irq_routes: Vec<InterruptRoute>,
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vm_fd: Arc<VmFd>,
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vm_fd: Arc<VmFd>,
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gsi_msi_routes: Arc<Mutex<HashMap<u32, kvm_irq_routing_entry>>>,
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gsi_msi_routes: Arc<Mutex<HashMap<u32, kvm_irq_routing_entry>>>,
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interrupt_cb: Option<Arc<InterruptDelivery>>,
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masked: bool,
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masked: bool,
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enabled: bool,
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enabled: bool,
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}
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}
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@ -90,16 +88,11 @@ impl MsixConfig {
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irq_routes,
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irq_routes,
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vm_fd,
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vm_fd,
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gsi_msi_routes,
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gsi_msi_routes,
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interrupt_cb: None,
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masked: false,
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masked: false,
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enabled: false,
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enabled: false,
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}
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}
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}
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}
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pub fn register_interrupt_cb(&mut self, cb: Arc<InterruptDelivery>) {
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self.interrupt_cb = Some(cb);
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}
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pub fn masked(&self) -> bool {
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pub fn masked(&self) -> bool {
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self.masked
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self.masked
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}
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}
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@ -366,13 +359,9 @@ impl MsixConfig {
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fn inject_msix_and_clear_pba(&mut self, vector: usize) {
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fn inject_msix_and_clear_pba(&mut self, vector: usize) {
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// Inject the MSI message
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// Inject the MSI message
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if let Some(cb) = &self.interrupt_cb {
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match self.irq_routes[vector].irq_fd.write(1) {
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match (cb)(InterruptParameters {
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msix: Some(&self.table_entries[vector]),
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}) {
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Ok(_) => debug!("MSI-X injected on vector control flip"),
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Ok(_) => debug!("MSI-X injected on vector control flip"),
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Err(e) => error!("failed to inject MSI-X: {}", e),
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Err(e) => error!("failed to inject MSI-X: {}", e),
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};
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}
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}
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// Clear the bit from PBA
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// Clear the bit from PBA
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@ -498,11 +498,6 @@ impl PciDevice for VirtioPciDevice {
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fn assign_msix(&mut self, msi_cb: Arc<InterruptDelivery>) {
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fn assign_msix(&mut self, msi_cb: Arc<InterruptDelivery>) {
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if let Some(msix_config) = &self.msix_config {
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if let Some(msix_config) = &self.msix_config {
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msix_config
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.lock()
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.unwrap()
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.register_interrupt_cb(msi_cb.clone());
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let msix_config_clone = msix_config.clone();
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let msix_config_clone = msix_config.clone();
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let common_config_msi_vector = self.common_config.msix_config.clone();
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let common_config_msi_vector = self.common_config.msix_config.clone();
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