From 1dc913427c1f81f4747b6c4167bd962da8abfc14 Mon Sep 17 00:00:00 2001
From: Rob Bradford <robert.bradford@intel.com>
Date: Fri, 14 Jan 2022 13:51:29 +0000
Subject: [PATCH] devices: legacy: Fix beta clippy issues

error: unneeded late initalization
Error:    --> devices/src/legacy/rtc_pl031.rs:294:9
    |
294 |         let v;
    |         ^^^^^^
    |
    = note: `-D clippy::needless-late-init` implied by `-D warnings`
    = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#needless_late_init
help: declare `v` here
    |
297 |         let v = if (AMBA_ID_LOW..AMBA_ID_HIGH).contains(&offset) {
    |         +++++++
help: remove the assignments from the branches
    |
299 ~             u32::from(PL031_ID[index])
300 |         } else {
301 ~             match offset {
302 |                 RTCDR => self.get_time(),
303 |                 RTCMR => {
304 |                     // Even though we are not implementing RTC alarm we return the last value
  ...
help: add a semicolon after the `if` expression
    |
317 |         };
    |          +

error: unneeded late initalization
Error:    --> devices/src/legacy/uart_pl011.rs:297:9
    |
297 |         let v;
    |         ^^^^^^
    |
    = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#needless_late_init
help: declare `v` here
    |
299 |         let v = if (AMBA_ID_LOW..AMBA_ID_HIGH).contains(&(offset >> 2)) {
    |         +++++++
help: remove the assignments from the branches
    |
301 ~             u32::from(PL011_ID[index])
302 |         } else {
303 ~             match offset >> 2 {
304 |                 UARTDR => {
305 |                     let c: u32;
306 |                     let r: u32;
  ...
help: add a semicolon after the `if` expression
    |
340 |         };
    |          +

error: unneeded late initalization
Error:    --> devices/src/legacy/uart_pl011.rs:305:21
    |
305 |                     let c: u32;
    |                     ^^^^^^^^^^^
    |
    = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#needless_late_init
help: declare `c` here
    |
309 |                     let c: u32 = self.read_fifo.pop_front().unwrap_or_default().into();
    |                     ~~~~~~~~~~

error: unneeded late initalization
Error:    --> devices/src/legacy/uart_pl011.rs:306:21
    |
306 |                     let r: u32;
    |                     ^^^^^^^^^^^
    |
    = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#needless_late_init
help: declare `r` here
    |
320 |                     let r: u32 = c;
    |                     ~~~~~~~~~~

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
---
 devices/src/legacy/rtc_pl031.rs  | 11 +++++------
 devices/src/legacy/uart_pl011.rs | 17 ++++++-----------
 2 files changed, 11 insertions(+), 17 deletions(-)

diff --git a/devices/src/legacy/rtc_pl031.rs b/devices/src/legacy/rtc_pl031.rs
index 73b3c4cf2..ca4fe6398 100644
--- a/devices/src/legacy/rtc_pl031.rs
+++ b/devices/src/legacy/rtc_pl031.rs
@@ -291,14 +291,13 @@ impl Rtc {
 
 impl BusDevice for Rtc {
     fn read(&mut self, _base: u64, offset: u64, data: &mut [u8]) {
-        let v;
         let mut read_ok = true;
 
-        if (AMBA_ID_LOW..AMBA_ID_HIGH).contains(&offset) {
+        let v = if (AMBA_ID_LOW..AMBA_ID_HIGH).contains(&offset) {
             let index = ((offset - AMBA_ID_LOW) >> 2) as usize;
-            v = u32::from(PL031_ID[index]);
+            u32::from(PL031_ID[index])
         } else {
-            v = match offset {
+            match offset {
                 RTCDR => self.get_time(),
                 RTCMR => {
                     // Even though we are not implementing RTC alarm we return the last value
@@ -313,8 +312,8 @@ impl BusDevice for Rtc {
                     read_ok = false;
                     0
                 }
-            };
-        }
+            }
+        };
         if read_ok && data.len() <= 4 {
             write_le_u32(data, v);
         } else {
diff --git a/devices/src/legacy/uart_pl011.rs b/devices/src/legacy/uart_pl011.rs
index 39e7a1cee..56742f3d8 100644
--- a/devices/src/legacy/uart_pl011.rs
+++ b/devices/src/legacy/uart_pl011.rs
@@ -294,19 +294,15 @@ impl Pl011 {
 
 impl BusDevice for Pl011 {
     fn read(&mut self, _base: u64, offset: u64, data: &mut [u8]) {
-        let v;
         let mut read_ok = true;
-        if (AMBA_ID_LOW..AMBA_ID_HIGH).contains(&(offset >> 2)) {
+        let v = if (AMBA_ID_LOW..AMBA_ID_HIGH).contains(&(offset >> 2)) {
             let index = ((offset - 0xfe0) >> 2) as usize;
-            v = u32::from(PL011_ID[index]);
+            u32::from(PL011_ID[index])
         } else {
-            v = match offset >> 2 {
+            match offset >> 2 {
                 UARTDR => {
-                    let c: u32;
-                    let r: u32;
-
                     self.flags &= !PL011_FLAG_RXFF;
-                    c = self.read_fifo.pop_front().unwrap_or_default().into();
+                    let c: u32 = self.read_fifo.pop_front().unwrap_or_default().into();
                     if self.read_count > 0 {
                         self.read_count -= 1;
                     }
@@ -317,8 +313,7 @@ impl BusDevice for Pl011 {
                         self.int_level &= !PL011_INT_RX;
                     }
                     self.rsr = c >> 8;
-                    r = c;
-                    r
+                    c
                 }
                 UARTRSR_UARTECR => self.rsr,
                 UARTFR => self.flags,
@@ -337,7 +332,7 @@ impl BusDevice for Pl011 {
                     0
                 }
             }
-        }
+        };
 
         if read_ok && data.len() <= 4 {
             write_le_u32(data, v);