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https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2024-12-22 13:45:20 +00:00
hypervisor: cpu: Expand Set/GetCoreRegisters
variant
Since RISC-V has its own definition of `CoreRegister`, expand the Aarch variant to avoid collision of `HypervisorCpuError`. Signed-off-by: Ruoqing He <heruoqing@iscas.ac.cn>
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@ -209,13 +209,13 @@ pub enum HypervisorCpuError {
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///
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/// Getting AArch64 core register error
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///
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#[error("Failed to get core register: {0}")]
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GetCoreRegister(#[source] anyhow::Error),
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#[error("Failed to get aarch64 core register: {0}")]
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GetAarchCoreRegister(#[source] anyhow::Error),
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///
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/// Setting AArch64 core register error
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///
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#[error("Failed to set core register: {0}")]
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SetCoreRegister(#[source] anyhow::Error),
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#[error("Failed to set aarch64 core register: {0}")]
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SetAarchCoreRegister(#[source] anyhow::Error),
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///
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/// Getting AArch64 registers list error
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///
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@ -1247,7 +1247,7 @@ impl cpu::Vcpu for KvmVcpu {
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.lock()
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.unwrap()
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), &mut bytes)
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::GetAarchCoreRegister(e.into()))?;
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state.regs.regs[i] = u64::from_le_bytes(bytes);
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off += std::mem::size_of::<u64>();
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}
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@ -1260,7 +1260,7 @@ impl cpu::Vcpu for KvmVcpu {
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.lock()
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.unwrap()
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), &mut bytes)
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::GetAarchCoreRegister(e.into()))?;
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state.regs.sp = u64::from_le_bytes(bytes);
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// Second one, the program counter.
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@ -1270,7 +1270,7 @@ impl cpu::Vcpu for KvmVcpu {
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.lock()
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.unwrap()
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), &mut bytes)
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::GetAarchCoreRegister(e.into()))?;
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state.regs.pc = u64::from_le_bytes(bytes);
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// Next is the processor state.
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@ -1280,7 +1280,7 @@ impl cpu::Vcpu for KvmVcpu {
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.lock()
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.unwrap()
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), &mut bytes)
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::GetAarchCoreRegister(e.into()))?;
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state.regs.pstate = u64::from_le_bytes(bytes);
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// The stack pointer associated with EL1
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@ -1290,7 +1290,7 @@ impl cpu::Vcpu for KvmVcpu {
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.lock()
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.unwrap()
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), &mut bytes)
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::GetAarchCoreRegister(e.into()))?;
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state.sp_el1 = u64::from_le_bytes(bytes);
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// Exception Link Register for EL1, when taking an exception to EL1, this register
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@ -1301,7 +1301,7 @@ impl cpu::Vcpu for KvmVcpu {
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.lock()
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.unwrap()
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), &mut bytes)
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::GetAarchCoreRegister(e.into()))?;
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state.elr_el1 = u64::from_le_bytes(bytes);
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// Saved Program Status Registers, there are 5 of them used in the kernel.
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@ -1312,7 +1312,7 @@ impl cpu::Vcpu for KvmVcpu {
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.lock()
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.unwrap()
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), &mut bytes)
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::GetAarchCoreRegister(e.into()))?;
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state.spsr[i] = u64::from_le_bytes(bytes);
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off += std::mem::size_of::<u64>();
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}
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@ -1326,7 +1326,7 @@ impl cpu::Vcpu for KvmVcpu {
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.lock()
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.unwrap()
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U128, off), &mut bytes)
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::GetAarchCoreRegister(e.into()))?;
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state.fp_regs.vregs[i] = u128::from_le_bytes(bytes);
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off += mem::size_of::<u128>();
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}
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@ -1338,7 +1338,7 @@ impl cpu::Vcpu for KvmVcpu {
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.lock()
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.unwrap()
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U32, off), &mut bytes)
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::GetAarchCoreRegister(e.into()))?;
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state.fp_regs.fpsr = u32::from_le_bytes(bytes);
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// Floating-point Control Register
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@ -1348,7 +1348,7 @@ impl cpu::Vcpu for KvmVcpu {
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.lock()
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.unwrap()
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U32, off), &mut bytes)
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::GetAarchCoreRegister(e.into()))?;
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state.fp_regs.fpcr = u32::from_le_bytes(bytes);
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Ok(state.into())
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}
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@ -1385,7 +1385,7 @@ impl cpu::Vcpu for KvmVcpu {
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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&kvm_regs_state.regs.regs[i].to_le_bytes(),
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetAarchCoreRegister(e.into()))?;
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off += std::mem::size_of::<u64>();
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}
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@ -1397,7 +1397,7 @@ impl cpu::Vcpu for KvmVcpu {
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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&kvm_regs_state.regs.sp.to_le_bytes(),
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetAarchCoreRegister(e.into()))?;
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let off = offset_of!(user_pt_regs, pc);
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self.fd
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@ -1407,7 +1407,7 @@ impl cpu::Vcpu for KvmVcpu {
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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&kvm_regs_state.regs.pc.to_le_bytes(),
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetAarchCoreRegister(e.into()))?;
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let off = offset_of!(user_pt_regs, pstate);
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self.fd
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@ -1417,7 +1417,7 @@ impl cpu::Vcpu for KvmVcpu {
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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&kvm_regs_state.regs.pstate.to_le_bytes(),
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetAarchCoreRegister(e.into()))?;
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let off = offset_of!(kvm_regs, sp_el1);
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self.fd
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@ -1427,7 +1427,7 @@ impl cpu::Vcpu for KvmVcpu {
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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&kvm_regs_state.sp_el1.to_le_bytes(),
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetAarchCoreRegister(e.into()))?;
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let off = offset_of!(kvm_regs, elr_el1);
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self.fd
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@ -1437,7 +1437,7 @@ impl cpu::Vcpu for KvmVcpu {
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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&kvm_regs_state.elr_el1.to_le_bytes(),
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetAarchCoreRegister(e.into()))?;
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let mut off = offset_of!(kvm_regs, spsr);
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for i in 0..KVM_NR_SPSR as usize {
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@ -1448,7 +1448,7 @@ impl cpu::Vcpu for KvmVcpu {
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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&kvm_regs_state.spsr[i].to_le_bytes(),
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetAarchCoreRegister(e.into()))?;
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off += std::mem::size_of::<u64>();
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}
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@ -1461,7 +1461,7 @@ impl cpu::Vcpu for KvmVcpu {
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arm64_core_reg_id!(KVM_REG_SIZE_U128, off),
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&kvm_regs_state.fp_regs.vregs[i].to_le_bytes(),
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetAarchCoreRegister(e.into()))?;
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off += mem::size_of::<u128>();
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}
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@ -1473,7 +1473,7 @@ impl cpu::Vcpu for KvmVcpu {
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arm64_core_reg_id!(KVM_REG_SIZE_U32, off),
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&kvm_regs_state.fp_regs.fpsr.to_le_bytes(),
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetAarchCoreRegister(e.into()))?;
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let off = offset_of!(kvm_regs, fp_regs) + offset_of!(user_fpsimd_state, fpcr);
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self.fd
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@ -1483,7 +1483,7 @@ impl cpu::Vcpu for KvmVcpu {
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arm64_core_reg_id!(KVM_REG_SIZE_U32, off),
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&kvm_regs_state.fp_regs.fpcr.to_le_bytes(),
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetAarchCoreRegister(e.into()))?;
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Ok(())
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}
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@ -1966,7 +1966,7 @@ impl cpu::Vcpu for KvmVcpu {
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arm64_core_reg_id!(KVM_REG_SIZE_U64, pstate),
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&PSTATE_FAULT_BITS_64.to_le_bytes(),
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetAarchCoreRegister(e.into()))?;
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// Other vCPUs are powered off initially awaiting PSCI wakeup.
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if cpu_id == 0 {
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@ -1979,7 +1979,7 @@ impl cpu::Vcpu for KvmVcpu {
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arm64_core_reg_id!(KVM_REG_SIZE_U64, pc),
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&boot_ip.to_le_bytes(),
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetAarchCoreRegister(e.into()))?;
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// Last mandatory thing to set -> the address pointing to the FDT (also called DTB).
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// "The device tree blob (dtb) must be placed on an 8-byte boundary and must
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@ -1993,7 +1993,7 @@ impl cpu::Vcpu for KvmVcpu {
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arm64_core_reg_id!(KVM_REG_SIZE_U64, regs0),
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&fdt_start.to_le_bytes(),
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetAarchCoreRegister(e.into()))?;
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}
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Ok(())
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}
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