From 29ce3076c23127f20afadcb7bbb2d0bfaf806688 Mon Sep 17 00:00:00 2001 From: Henry Wang Date: Mon, 31 Aug 2020 16:17:51 +0800 Subject: [PATCH] tests: AArch64: Add unit test cases for accessing GIC registers This commit adds the unit test cases for getting/setting the GIC distributor, redistributor and ICC registers. Signed-off-by: Henry Wang --- vmm/src/interrupt.rs | 55 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/vmm/src/interrupt.rs b/vmm/src/interrupt.rs index f11e1bc7c..96194833a 100644 --- a/vmm/src/interrupt.rs +++ b/vmm/src/interrupt.rs @@ -396,6 +396,9 @@ pub mod kvm { #[cfg(test)] mod tests { use arch::aarch64::gic::kvm::create_gic; + use arch::aarch64::gic::{ + get_dist_regs, get_icc_regs, get_redist_regs, set_dist_regs, set_icc_regs, set_redist_regs, + }; #[test] fn test_create_gic() { @@ -404,4 +407,56 @@ mod tests { assert!(create_gic(&vm, 1, false).is_ok()); } + + #[test] + fn test_get_set_dist_regs() { + let hv = hypervisor::new().unwrap(); + let vm = hv.create_vm().unwrap(); + let _ = vm.create_vcpu(0).unwrap(); + let gic = create_gic(&vm, 1, false).expect("Cannot create gic"); + + let res = get_dist_regs(gic.device()); + assert!(res.is_ok()); + let state = res.unwrap(); + assert_eq!(state.len(), 244); + + let res = set_dist_regs(gic.device(), &state); + assert!(res.is_ok()); + } + + #[test] + fn test_get_set_redist_regs() { + let hv = hypervisor::new().unwrap(); + let vm = hv.create_vm().unwrap(); + let _ = vm.create_vcpu(0).unwrap(); + let gic = create_gic(&vm, 1, false).expect("Cannot create gic"); + + let mut gicr_typer = Vec::new(); + gicr_typer.push(123); + let res = get_redist_regs(gic.device(), &gicr_typer); + assert!(res.is_ok()); + let state = res.unwrap(); + println!("{}", state.len()); + assert!(state.len() == 24); + + assert!(set_redist_regs(gic.device(), &gicr_typer, &state).is_ok()); + } + + #[test] + fn test_get_set_icc_regs() { + let hv = hypervisor::new().unwrap(); + let vm = hv.create_vm().unwrap(); + let _ = vm.create_vcpu(0).unwrap(); + let gic = create_gic(&vm, 1, false).expect("Cannot create gic"); + + let mut gicr_typer = Vec::new(); + gicr_typer.push(123); + let res = get_icc_regs(gic.device(), &gicr_typer); + assert!(res.is_ok()); + let state = res.unwrap(); + println!("{}", state.len()); + assert!(state.len() == 9); + + assert!(set_icc_regs(gic.device(), &gicr_typer, &state).is_ok()); + } }