vmm: Refactor PCI segment creation to support non-default segment

Split PciSegment::new_default_segment() into a separate
PciSegment::new() and those parts required only for the default segment
(PIO PCI config device.)

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
This commit is contained in:
Rob Bradford 2021-10-05 15:36:08 +01:00
parent 080ce9b068
commit 3059ba4305

View File

@ -46,14 +46,12 @@ pub(crate) struct PciSegment {
}
impl PciSegment {
pub(crate) fn new_default_segment(
pub(crate) fn new(
id: u16,
address_manager: &Arc<AddressManager>,
start_of_device_area: u64,
end_of_device_area: u64,
) -> DeviceManagerResult<PciSegment> {
// Default segment
let id = 0u16;
let pci_root = PciRoot::new(None);
let pci_bus = Arc::new(Mutex::new(PciBus::new(
pci_root,
@ -61,7 +59,6 @@ impl PciSegment {
)));
let pci_config_mmio = Arc::new(Mutex::new(PciConfigMmio::new(Arc::clone(&pci_bus))));
let mmio_config_address = layout::PCI_MMCONFIG_START.0 + PCI_MMIO_CONFIG_SIZE * id as u64;
address_manager
@ -73,19 +70,6 @@ impl PciSegment {
)
.map_err(DeviceManagerError::BusError)?;
#[cfg(target_arch = "x86_64")]
let pci_config_io = Arc::new(Mutex::new(PciConfigIo::new(Arc::clone(&pci_bus))));
#[cfg(target_arch = "x86_64")]
address_manager
.io_bus
.insert(
pci_config_io.clone(),
PCI_CONFIG_IO_PORT,
PCI_CONFIG_IO_PORT_SIZE,
)
.map_err(DeviceManagerError::BusError)?;
let mut segment = PciSegment {
id,
pci_bus,
@ -95,7 +79,7 @@ impl PciSegment {
pci_devices_down: 0,
pci_irq_slots: [0; 32],
#[cfg(target_arch = "x86_64")]
pci_config_io: Some(pci_config_io),
pci_config_io: None,
start_of_device_area,
end_of_device_area,
};
@ -110,6 +94,38 @@ impl PciSegment {
Ok(segment)
}
#[cfg(target_arch = "x86_64")]
pub(crate) fn new_default_segment(
address_manager: &Arc<AddressManager>,
start_of_device_area: u64,
end_of_device_area: u64,
) -> DeviceManagerResult<PciSegment> {
let mut segment = Self::new(0, address_manager, start_of_device_area, end_of_device_area)?;
let pci_config_io = Arc::new(Mutex::new(PciConfigIo::new(Arc::clone(&segment.pci_bus))));
address_manager
.io_bus
.insert(
pci_config_io.clone(),
PCI_CONFIG_IO_PORT,
PCI_CONFIG_IO_PORT_SIZE,
)
.map_err(DeviceManagerError::BusError)?;
segment.pci_config_io = Some(pci_config_io);
Ok(segment)
}
#[cfg(target_arch = "aarch64")]
pub(crate) fn new_default_segment(
address_manager: &Arc<AddressManager>,
start_of_device_area: u64,
end_of_device_area: u64,
) -> DeviceManagerResult<PciSegment> {
Self::new(0, address_manager, start_of_device_area, end_of_device_area)
}
pub(crate) fn next_device_bdf(&self) -> DeviceManagerResult<u32> {
// We need to shift the device id since the 3 first bits
// are dedicated to the PCI function, and we know we don't