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vmm: Refactor PCI segment creation to support non-default segment
Split PciSegment::new_default_segment() into a separate PciSegment::new() and those parts required only for the default segment (PIO PCI config device.) Signed-off-by: Rob Bradford <robert.bradford@intel.com>
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parent
080ce9b068
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@ -46,14 +46,12 @@ pub(crate) struct PciSegment {
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}
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impl PciSegment {
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pub(crate) fn new_default_segment(
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pub(crate) fn new(
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id: u16,
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address_manager: &Arc<AddressManager>,
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start_of_device_area: u64,
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end_of_device_area: u64,
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) -> DeviceManagerResult<PciSegment> {
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// Default segment
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let id = 0u16;
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let pci_root = PciRoot::new(None);
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let pci_bus = Arc::new(Mutex::new(PciBus::new(
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pci_root,
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@ -61,7 +59,6 @@ impl PciSegment {
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)));
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let pci_config_mmio = Arc::new(Mutex::new(PciConfigMmio::new(Arc::clone(&pci_bus))));
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let mmio_config_address = layout::PCI_MMCONFIG_START.0 + PCI_MMIO_CONFIG_SIZE * id as u64;
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address_manager
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@ -73,19 +70,6 @@ impl PciSegment {
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)
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.map_err(DeviceManagerError::BusError)?;
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#[cfg(target_arch = "x86_64")]
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let pci_config_io = Arc::new(Mutex::new(PciConfigIo::new(Arc::clone(&pci_bus))));
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#[cfg(target_arch = "x86_64")]
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address_manager
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.io_bus
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.insert(
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pci_config_io.clone(),
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PCI_CONFIG_IO_PORT,
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PCI_CONFIG_IO_PORT_SIZE,
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)
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.map_err(DeviceManagerError::BusError)?;
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let mut segment = PciSegment {
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id,
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pci_bus,
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@ -95,7 +79,7 @@ impl PciSegment {
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pci_devices_down: 0,
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pci_irq_slots: [0; 32],
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#[cfg(target_arch = "x86_64")]
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pci_config_io: Some(pci_config_io),
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pci_config_io: None,
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start_of_device_area,
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end_of_device_area,
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};
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@ -110,6 +94,38 @@ impl PciSegment {
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Ok(segment)
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}
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#[cfg(target_arch = "x86_64")]
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pub(crate) fn new_default_segment(
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address_manager: &Arc<AddressManager>,
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start_of_device_area: u64,
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end_of_device_area: u64,
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) -> DeviceManagerResult<PciSegment> {
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let mut segment = Self::new(0, address_manager, start_of_device_area, end_of_device_area)?;
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let pci_config_io = Arc::new(Mutex::new(PciConfigIo::new(Arc::clone(&segment.pci_bus))));
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address_manager
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.io_bus
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.insert(
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pci_config_io.clone(),
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PCI_CONFIG_IO_PORT,
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PCI_CONFIG_IO_PORT_SIZE,
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)
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.map_err(DeviceManagerError::BusError)?;
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segment.pci_config_io = Some(pci_config_io);
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Ok(segment)
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}
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#[cfg(target_arch = "aarch64")]
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pub(crate) fn new_default_segment(
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address_manager: &Arc<AddressManager>,
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start_of_device_area: u64,
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end_of_device_area: u64,
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) -> DeviceManagerResult<PciSegment> {
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Self::new(0, address_manager, start_of_device_area, end_of_device_area)
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}
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pub(crate) fn next_device_bdf(&self) -> DeviceManagerResult<u32> {
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// We need to shift the device id since the 3 first bits
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// are dedicated to the PCI function, and we know we don't
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