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arch: x86_64: Refactor the way to generate e820 RAM maps
This patch defines a new function 'generate_ram_ranges', to generate usable physical memory ranges for the guest based on the existing guest memory managed by VMM. This function is also made public, so that it can be reused, say by the IGVM loader in the future [1]. No functional change. See: #6020 Signed-off-by: Bo Chen <chen.bo@intel.com>
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@ -91,8 +91,9 @@ pub mod x86_64;
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#[cfg(target_arch = "x86_64")]
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pub use x86_64::{
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arch_memory_regions, configure_system, configure_vcpu, generate_common_cpuid,
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get_host_cpu_phys_bits, initramfs_load_addr, layout, layout::CMDLINE_MAX_SIZE,
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layout::CMDLINE_START, regs, CpuidConfig, CpuidFeatureEntry, EntryPoint, _NSIG,
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generate_ram_ranges, get_host_cpu_phys_bits, initramfs_load_addr, layout,
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layout::CMDLINE_MAX_SIZE, layout::CMDLINE_START, regs, CpuidConfig, CpuidFeatureEntry,
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EntryPoint, _NSIG,
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};
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/// Safe wrapper for `sysconf(_SC_PAGESIZE)`.
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@ -926,6 +926,112 @@ pub fn configure_system(
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)
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}
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type RamRange = (u64, u64);
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/// Returns usable physical memory ranges for the guest
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/// These should be used to create e820_RAM memory maps
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///
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/// There are up to two usable physical memory ranges,
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/// divided by the gap at the end of 32bit address space.
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pub fn generate_ram_ranges(
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guest_mem: &GuestMemoryMmap,
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) -> super::Result<(RamRange, Option<RamRange>)> {
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// Merge continuous memory regions into one region.
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// Note: memory regions from "GuestMemory" are sorted and non-zero sized.
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let ram_regions = {
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let mut ram_regions = Vec::new();
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let mut current_start = guest_mem
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.iter()
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.next()
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.map(GuestMemoryRegion::start_addr)
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.expect("GuestMemory must have one memory region at least")
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.raw_value();
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let mut current_end = current_start;
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for (start, size) in guest_mem
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.iter()
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.map(|m| (m.start_addr().raw_value(), m.len()))
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{
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if current_end == start {
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// This zone is continuous with the previous one.
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current_end += size;
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} else {
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ram_regions.push((current_start, current_end));
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current_start = start;
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current_end = start + size;
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}
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}
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ram_regions.push((current_start, current_end));
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ram_regions
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};
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if ram_regions.len() > 2 {
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error!(
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"There should be up to two usable physical memory ranges, devidided by the
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gap at the end of 32bit address space (e.g. between 3G and 4G)."
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);
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return Err(super::Error::MemmapTableSetup);
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}
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// Generate the first usable physical memory range before the gap
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let first_ram_range = {
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let (first_region_start, first_region_end) =
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ram_regions.first().ok_or(super::Error::MemmapTableSetup)?;
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let high_ram_start = layout::HIGH_RAM_START.raw_value();
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let mem_32bit_reserved_start = layout::MEM_32BIT_RESERVED_START.raw_value();
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if !((first_region_start <= &high_ram_start)
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&& (first_region_end > &high_ram_start)
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&& (first_region_end <= &mem_32bit_reserved_start))
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{
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error!(
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"Unexpected first memory region layout: (start: 0x{:08x}, end: 0x{:08x}).
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high_ram_start: 0x{:08x}, mem_32bit_reserved_start: 0x{:08x}",
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first_region_start, first_region_end, high_ram_start, mem_32bit_reserved_start
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);
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return Err(super::Error::MemmapTableSetup);
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}
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info!(
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"first usable physical memory range, start: 0x{:08x}, end: 0x{:08x}",
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high_ram_start, first_region_end
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);
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(high_ram_start, *first_region_end)
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};
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// Generate the second usable physical memory range after the gap if any
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let second_ram_range = if let Some((second_region_start, second_region_end)) =
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ram_regions.get(1)
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{
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let ram_64bit_start = layout::RAM_64BIT_START.raw_value();
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if second_region_start != &ram_64bit_start {
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error!(
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"Unexpected second memory region layout: start: 0x{:08x}, ram_64bit_start: 0x{:08x}",
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second_region_start, ram_64bit_start
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);
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return Err(super::Error::MemmapTableSetup);
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}
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info!(
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"Second usable physical memory range, start: 0x{:08x}, end: 0x{:08x}",
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ram_64bit_start, second_region_end
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);
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Some((ram_64bit_start, *second_region_end))
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} else {
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None
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};
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Ok((first_ram_range, second_ram_range))
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}
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fn configure_pvh(
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guest_mem: &GuestMemoryMmap,
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cmdline_addr: GuestAddress,
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@ -972,100 +1078,31 @@ fn configure_pvh(
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// Create the memory map entries.
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add_memmap_entry(&mut memmap, 0, layout::EBDA_START.raw_value(), E820_RAM);
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// Merge continuous memory regions into one region.
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// Note: memory regions from "GuestMemory" are sorted and non-zero sized.
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let ram_regions = {
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let mut ram_regions = Vec::new();
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let mut current_start = guest_mem
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.iter()
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.next()
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.map(GuestMemoryRegion::start_addr)
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.expect("GuestMemory must have one memory region at least")
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.raw_value();
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let mut current_end = current_start;
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for (start, size) in guest_mem
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.iter()
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.map(|m| (m.start_addr().raw_value(), m.len()))
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{
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if current_end == start {
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// This zone is continuous with the previous one.
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current_end += size;
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} else {
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ram_regions.push((current_start, current_end));
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current_start = start;
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current_end = start + size;
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}
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}
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ram_regions.push((current_start, current_end));
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ram_regions
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};
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if ram_regions.len() > 2 {
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error!(
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"There should be up to two non-continuous regions, devidided by the
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gap at the end of 32bit address space (e.g. between 3G and 4G)."
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);
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return Err(super::Error::MemmapTableSetup);
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}
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// Create the memory map entry for memory region before the gap
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{
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let (first_region_start, first_region_end) =
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ram_regions.first().ok_or(super::Error::MemmapTableSetup)?;
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let high_ram_start = layout::HIGH_RAM_START.raw_value();
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let mem_32bit_reserved_start = layout::MEM_32BIT_RESERVED_START.raw_value();
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if !((first_region_start <= &high_ram_start)
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&& (first_region_end > &high_ram_start)
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&& (first_region_end <= &mem_32bit_reserved_start))
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{
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error!(
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"Unexpected first memory region layout: (start: 0x{:08x}, end: 0x{:08x}).
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high_ram_start: 0x{:08x}, mem_32bit_reserved_start: 0x{:08x}",
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first_region_start, first_region_end, high_ram_start, mem_32bit_reserved_start
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);
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return Err(super::Error::MemmapTableSetup);
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}
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// Get usable physical memory ranges
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let (first_ram_range, second_ram_range) = generate_ram_ranges(guest_mem)?;
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// Create e820 memory map entry before the gap
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info!(
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"create_memmap_entry, start: 0x{:08x}, end: 0x{:08x}",
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high_ram_start, first_region_end
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first_ram_range.0, first_ram_range.1
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);
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add_memmap_entry(
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&mut memmap,
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high_ram_start,
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first_region_end - high_ram_start,
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first_ram_range.0,
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first_ram_range.1 - first_ram_range.0,
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E820_RAM,
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);
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}
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// Create the memory map entry for memory region after the gap if any
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if let Some((second_region_start, second_region_end)) = ram_regions.get(1) {
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let ram_64bit_start = layout::RAM_64BIT_START.raw_value();
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if second_region_start != &ram_64bit_start {
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error!(
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"Unexpected second memory region layout: start: 0x{:08x}, ram_64bit_start: 0x{:08x}",
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second_region_start, ram_64bit_start
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);
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return Err(super::Error::MemmapTableSetup);
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}
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// Create e820 memory map after the gap if any
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if let Some(second_ram_range) = second_ram_range {
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info!(
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"create_memmap_entry, start: 0x{:08x}, end: 0x{:08x}",
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ram_64bit_start, second_region_end
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second_ram_range.0, second_ram_range.1
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);
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add_memmap_entry(
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&mut memmap,
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ram_64bit_start,
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second_region_end - ram_64bit_start,
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second_ram_range.0,
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second_ram_range.1 - second_ram_range.0,
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E820_RAM,
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);
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}
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