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hypervisor: x86: emulate MOVSW
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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1bfa07f48e
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@ -90,6 +90,11 @@ impl<T: CpuStateManager> InstructionHandler<T> for Movsd_m32_m32 {
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movs!(u32);
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movs!(u32);
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}
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}
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pub struct Movsw_m16_m16;
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impl<T: CpuStateManager> InstructionHandler<T> for Movsw_m16_m16 {
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movs!(u16);
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}
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#[cfg(test)]
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#[cfg(test)]
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mod tests {
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mod tests {
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#![allow(unused_mut)]
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#![allow(unused_mut)]
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@ -148,4 +153,66 @@ mod tests {
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vmm.read_memory(0x8 + 8, &mut data).unwrap();
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vmm.read_memory(0x8 + 8, &mut data).unwrap();
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assert_eq!(0x0, <u32>::from_le_bytes(data));
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assert_eq!(0x0, <u32>::from_le_bytes(data));
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}
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}
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#[test]
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fn test_rep_movsw_m16_m16() {
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let ip: u64 = 0x1000;
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let memory: [u8; 24] = [
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0x78, 0x56, 0x34, 0x12, // 0x12345678
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0xdd, 0xcc, 0xbb, 0xaa, // 0xaabbccdd
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0xa5, 0x5a, 0xa5, 0x5a, // 0x5aa55aa5
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0x00, 0x00, 0x00, 0x00, // 0x00000000
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0x00, 0x00, 0x00, 0x00, // 0x00000000
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0x00, 0x00, 0x00, 0x00, // 0x00000000
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];
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let insn = [0x66, 0xf3, 0xa5]; // rep movsw
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let regs = vec![(Register::ECX, 6), (Register::ESI, 0), (Register::EDI, 0xc)];
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let mut data = [0u8; 2];
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let mut vmm = MockVmm::new(ip, regs, Some((0, &memory)));
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assert!(vmm.emulate_first_insn(0, &insn).is_ok());
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vmm.read_memory(0xc, &mut data).unwrap();
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assert_eq!(0x5678, <u16>::from_le_bytes(data));
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vmm.read_memory(0xc + 2, &mut data).unwrap();
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assert_eq!(0x1234, <u16>::from_le_bytes(data));
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vmm.read_memory(0xc + 4, &mut data).unwrap();
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assert_eq!(0xccdd, <u16>::from_le_bytes(data));
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vmm.read_memory(0xc + 6, &mut data).unwrap();
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assert_eq!(0xaabb, <u16>::from_le_bytes(data));
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vmm.read_memory(0xc + 8, &mut data).unwrap();
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assert_eq!(0x5aa5, <u16>::from_le_bytes(data));
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vmm.read_memory(0xc + 10, &mut data).unwrap();
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assert_eq!(0x5aa5, <u16>::from_le_bytes(data));
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// The rest should be default value 0 from MockVmm
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vmm.read_memory(0xc + 12, &mut data).unwrap();
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assert_eq!(0x0, <u16>::from_le_bytes(data));
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}
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#[test]
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fn test_movsw_m16_m16() {
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let ip: u64 = 0x1000;
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let memory: [u8; 4] = [
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0x78, 0x56, 0x34, 0x12, // 0x12345678
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];
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let insn = [0x66, 0xa5]; // movsw
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let regs = vec![(Register::ESI, 0), (Register::EDI, 0x8)];
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let mut data = [0u8; 2];
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let mut vmm = MockVmm::new(ip, regs, Some((0, &memory)));
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assert!(vmm.emulate_first_insn(0, &insn).is_ok());
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vmm.read_memory(0x8, &mut data).unwrap();
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assert_eq!(0x5678, <u16>::from_le_bytes(data));
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// Only two bytes were copied, so the value at 0xa should be zero
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vmm.read_memory(0xa, &mut data).unwrap();
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assert_eq!(0x0, <u16>::from_le_bytes(data));
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// The rest should be default value 0 from MockVmm
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vmm.read_memory(0x4, &mut data).unwrap();
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assert_eq!(0x0, <u16>::from_le_bytes(data));
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vmm.read_memory(0x8 + 8, &mut data).unwrap();
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assert_eq!(0x0, <u16>::from_le_bytes(data));
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}
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}
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}
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@ -526,6 +526,7 @@ impl<'a, T: CpuStateManager> Emulator<'a, T> {
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(mov, Movzx_r64_rm16),
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(mov, Movzx_r64_rm16),
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// MOVS
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// MOVS
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(movs, Movsd_m32_m32),
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(movs, Movsd_m32_m32),
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(movs, Movsw_m16_m16),
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// OR
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// OR
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(or, Or_rm8_r8)
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(or, Or_rm8_r8)
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);
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);
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