diff --git a/vmm/src/cpu.rs b/vmm/src/cpu.rs
index bb04276e6..ad42b8340 100644
--- a/vmm/src/cpu.rs
+++ b/vmm/src/cpu.rs
@@ -627,40 +627,38 @@ impl CpuManager {
         phys_bits: u8,
         kvm_hyperv: bool,
     ) -> Result<CpuId> {
-        let mut cpuid_patches = Vec::new();
-
-        // Patch tsc deadline timer bit
-        cpuid_patches.push(CpuidPatch {
-            function: 1,
-            index: 0,
-            flags_bit: None,
-            eax_bit: None,
-            ebx_bit: None,
-            ecx_bit: Some(TSC_DEADLINE_TIMER_ECX_BIT),
-            edx_bit: None,
-        });
-
-        // Patch hypervisor bit
-        cpuid_patches.push(CpuidPatch {
-            function: 1,
-            index: 0,
-            flags_bit: None,
-            eax_bit: None,
-            ebx_bit: None,
-            ecx_bit: Some(HYPERVISOR_ECX_BIT),
-            edx_bit: None,
-        });
-
-        // Enable MTRR feature
-        cpuid_patches.push(CpuidPatch {
-            function: 1,
-            index: 0,
-            flags_bit: None,
-            eax_bit: None,
-            ebx_bit: None,
-            ecx_bit: None,
-            edx_bit: Some(MTRR_EDX_BIT),
-        });
+        let cpuid_patches = vec![
+            // Patch tsc deadline timer bit
+            CpuidPatch {
+                function: 1,
+                index: 0,
+                flags_bit: None,
+                eax_bit: None,
+                ebx_bit: None,
+                ecx_bit: Some(TSC_DEADLINE_TIMER_ECX_BIT),
+                edx_bit: None,
+            },
+            // Patch hypervisor bit
+            CpuidPatch {
+                function: 1,
+                index: 0,
+                flags_bit: None,
+                eax_bit: None,
+                ebx_bit: None,
+                ecx_bit: Some(HYPERVISOR_ECX_BIT),
+                edx_bit: None,
+            },
+            // Enable MTRR feature
+            CpuidPatch {
+                function: 1,
+                index: 0,
+                flags_bit: None,
+                eax_bit: None,
+                ebx_bit: None,
+                ecx_bit: None,
+                edx_bit: Some(MTRR_EDX_BIT),
+            },
+        ];
 
         // Supported CPUID
         let mut cpuid = hypervisor
diff --git a/vmm/src/device_manager.rs b/vmm/src/device_manager.rs
index 9724ffa8c..6b83af6c2 100644
--- a/vmm/src/device_manager.rs
+++ b/vmm/src/device_manager.rs
@@ -2304,11 +2304,10 @@ impl DeviceManager {
                     )
                     .map_err(DeviceManagerError::MemoryManager)?;
 
-                let mut region_list = Vec::new();
-                region_list.push(VirtioSharedMemory {
+                let region_list = vec![VirtioSharedMemory {
                     offset: 0,
                     len: cache_size,
-                });
+                }];
 
                 Some((
                     VirtioSharedMemoryList {
@@ -4000,7 +3999,7 @@ impl BusDevice for DeviceManager {
             B0EJ_FIELD_OFFSET => {
                 assert!(data.len() == B0EJ_FIELD_SIZE);
                 let mut data_array: [u8; 4] = [0, 0, 0, 0];
-                data_array.copy_from_slice(&data[..]);
+                data_array.copy_from_slice(&data);
                 let device_bitmap = u32::from_le_bytes(data_array);
 
                 for device_id in 0..32 {