mirror of
https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2024-10-01 02:55:45 +00:00
hypervisor, vm-device: Relocate InterruptSourceConfig
Move this enum from vm-device to hypervisor crate so that hypervisor crate does not gain an extra dependency. Signed-off-by: Rob Bradford <robert.bradford@intel.com>
This commit is contained in:
parent
b1bd87df19
commit
3ffc105f83
2
Cargo.lock
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2
Cargo.lock
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@ -356,7 +356,6 @@ dependencies = [
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"serde_derive",
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"serde_derive",
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"serde_json",
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"serde_json",
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"thiserror",
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"thiserror",
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"vm-device",
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"vm-memory",
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"vm-memory",
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"vmm-sys-util",
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"vmm-sys-util",
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]
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]
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@ -1297,6 +1296,7 @@ name = "vm-device"
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version = "0.1.0"
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version = "0.1.0"
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dependencies = [
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dependencies = [
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"anyhow",
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"anyhow",
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"hypervisor",
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"serde",
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"serde",
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"serde_derive",
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"serde_derive",
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"serde_json",
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"serde_json",
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@ -23,7 +23,6 @@ mshv-ioctls = { git = "https://github.com/rust-vmm/mshv", branch = "main", optio
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serde = { version = "1.0.137", features = ["rc"] }
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serde = { version = "1.0.137", features = ["rc"] }
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serde_derive = "1.0.137"
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serde_derive = "1.0.137"
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serde_json = "1.0.81"
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serde_json = "1.0.81"
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vm-device = { path = "../vm-device" }
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vm-memory = { version = "0.7.0", features = ["backend-mmap", "backend-atomic"] }
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vm-memory = { version = "0.7.0", features = ["backend-mmap", "backend-atomic"] }
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vmm-sys-util = { version = "0.9.0", features = ["with-serde"] }
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vmm-sys-util = { version = "0.9.0", features = ["with-serde"] }
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@ -17,7 +17,7 @@ use crate::cpu;
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use crate::device;
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use crate::device;
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use crate::hypervisor;
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use crate::hypervisor;
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use crate::vec_with_array_field;
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use crate::vec_with_array_field;
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use crate::vm::{self, VmOps};
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use crate::vm::{self, InterruptSourceConfig, VmOps};
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#[cfg(target_arch = "aarch64")]
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#[cfg(target_arch = "aarch64")]
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use crate::{arm64_core_reg_id, offset__of};
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use crate::{arm64_core_reg_id, offset__of};
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use kvm_ioctls::{NoDatamatch, VcpuFd, VmFd};
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use kvm_ioctls::{NoDatamatch, VcpuFd, VmFd};
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@ -32,7 +32,6 @@ use std::result;
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#[cfg(target_arch = "x86_64")]
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#[cfg(target_arch = "x86_64")]
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use std::sync::atomic::{AtomicBool, Ordering};
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use std::sync::atomic::{AtomicBool, Ordering};
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use std::sync::{Arc, RwLock};
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use std::sync::{Arc, RwLock};
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use vm_device::interrupt::InterruptSourceConfig;
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use vmm_sys_util::eventfd::EventFd;
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use vmm_sys_util::eventfd::EventFd;
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// x86_64 dependencies
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// x86_64 dependencies
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#[cfg(target_arch = "x86_64")]
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#[cfg(target_arch = "x86_64")]
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@ -11,7 +11,7 @@ use crate::cpu;
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use crate::cpu::Vcpu;
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use crate::cpu::Vcpu;
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use crate::hypervisor;
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use crate::hypervisor;
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use crate::vec_with_array_field;
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use crate::vec_with_array_field;
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use crate::vm::{self, VmOps};
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use crate::vm::{self, InterruptSourceConfig, VmOps};
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pub use mshv_bindings::*;
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pub use mshv_bindings::*;
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pub use mshv_ioctls::IoEventAddress;
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pub use mshv_ioctls::IoEventAddress;
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use mshv_ioctls::{set_registers_64, Mshv, NoDatamatch, VcpuFd, VmFd};
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use mshv_ioctls::{set_registers_64, Mshv, NoDatamatch, VcpuFd, VmFd};
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@ -23,7 +23,6 @@ use vm::DataMatch;
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#[cfg(target_arch = "x86_64")]
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#[cfg(target_arch = "x86_64")]
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pub mod x86_64;
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pub mod x86_64;
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use crate::device;
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use crate::device;
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use vm_device::interrupt::InterruptSourceConfig;
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use vmm_sys_util::eventfd::EventFd;
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use vmm_sys_util::eventfd::EventFd;
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#[cfg(target_arch = "x86_64")]
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#[cfg(target_arch = "x86_64")]
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pub use x86_64::VcpuMshvState as CpuState;
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pub use x86_64::VcpuMshvState as CpuState;
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@ -28,7 +28,6 @@ use kvm_ioctls::Cap;
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use std::fs::File;
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use std::fs::File;
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use std::sync::Arc;
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use std::sync::Arc;
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use thiserror::Error;
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use thiserror::Error;
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use vm_device::interrupt::InterruptSourceConfig;
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use vmm_sys_util::eventfd::EventFd;
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use vmm_sys_util::eventfd::EventFd;
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///
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///
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@ -217,6 +216,39 @@ pub enum HypervisorVmError {
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///
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///
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pub type Result<T> = std::result::Result<T, HypervisorVmError>;
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pub type Result<T> = std::result::Result<T, HypervisorVmError>;
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/// Configuration data for legacy interrupts.
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///
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/// On x86 platforms, legacy interrupts means those interrupts routed through PICs or IOAPICs.
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#[derive(Copy, Clone, Debug)]
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pub struct LegacyIrqSourceConfig {
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pub irqchip: u32,
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pub pin: u32,
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}
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/// Configuration data for MSI/MSI-X interrupts.
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///
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/// On x86 platforms, these interrupts are vectors delivered directly to the LAPIC.
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#[derive(Copy, Clone, Debug, Default)]
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pub struct MsiIrqSourceConfig {
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/// High address to delivery message signaled interrupt.
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pub high_addr: u32,
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/// Low address to delivery message signaled interrupt.
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pub low_addr: u32,
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/// Data to write to delivery message signaled interrupt.
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pub data: u32,
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/// Unique ID of the device to delivery message signaled interrupt.
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pub devid: u32,
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}
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/// Configuration data for an interrupt source.
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#[derive(Copy, Clone, Debug)]
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pub enum InterruptSourceConfig {
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/// Configuration data for Legacy interrupts.
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LegacyIrq(LegacyIrqSourceConfig),
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/// Configuration data for PciMsi, PciMsix and generic MSI interrupts.
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MsiIrq(MsiIrqSourceConfig),
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}
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///
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///
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/// Trait to represent a Vm
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/// Trait to represent a Vm
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///
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///
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@ -11,6 +11,7 @@ mshv = ["vfio-ioctls/mshv"]
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[dependencies]
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[dependencies]
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anyhow = "1.0.57"
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anyhow = "1.0.57"
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hypervisor = { path = "../hypervisor" }
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thiserror = "1.0.31"
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thiserror = "1.0.31"
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serde = { version = "1.0.137", features = ["rc"] }
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serde = { version = "1.0.137", features = ["rc"] }
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serde_derive = "1.0.137"
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serde_derive = "1.0.137"
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@ -57,6 +57,7 @@
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//! * The virtual device backend requests the interrupt manager to create an interrupt group
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//! * The virtual device backend requests the interrupt manager to create an interrupt group
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//! according to guest configuration information
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//! according to guest configuration information
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pub use hypervisor::vm::{InterruptSourceConfig, LegacyIrqSourceConfig, MsiIrqSourceConfig};
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use std::sync::Arc;
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use std::sync::Arc;
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use vmm_sys_util::eventfd::EventFd;
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use vmm_sys_util::eventfd::EventFd;
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@ -66,39 +67,6 @@ pub type Result<T> = std::io::Result<T>;
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/// Data type to store an interrupt source identifier.
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/// Data type to store an interrupt source identifier.
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pub type InterruptIndex = u32;
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pub type InterruptIndex = u32;
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/// Configuration data for legacy interrupts.
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///
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/// On x86 platforms, legacy interrupts means those interrupts routed through PICs or IOAPICs.
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#[derive(Copy, Clone, Debug)]
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pub struct LegacyIrqSourceConfig {
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pub irqchip: u32,
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pub pin: u32,
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}
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/// Configuration data for MSI/MSI-X interrupts.
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///
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/// On x86 platforms, these interrupts are vectors delivered directly to the LAPIC.
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#[derive(Copy, Clone, Debug, Default)]
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pub struct MsiIrqSourceConfig {
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/// High address to delivery message signaled interrupt.
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pub high_addr: u32,
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/// Low address to delivery message signaled interrupt.
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pub low_addr: u32,
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/// Data to write to delivery message signaled interrupt.
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pub data: u32,
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/// Unique ID of the device to delivery message signaled interrupt.
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pub devid: u32,
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}
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/// Configuration data for an interrupt source.
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#[derive(Copy, Clone, Debug)]
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pub enum InterruptSourceConfig {
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/// Configuration data for Legacy interrupts.
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LegacyIrq(LegacyIrqSourceConfig),
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/// Configuration data for PciMsi, PciMsix and generic MSI interrupts.
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MsiIrq(MsiIrqSourceConfig),
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}
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/// Configuration data for legacy, pin based interrupt groups.
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/// Configuration data for legacy, pin based interrupt groups.
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///
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///
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/// A legacy interrupt group only takes one irq number as its configuration.
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/// A legacy interrupt group only takes one irq number as its configuration.
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