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build: Bump acpi_tables version
Fix newly added deprecation for mispelling of cacheable. Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
This commit is contained in:
parent
1b9ce69afa
commit
4548de194d
2
Cargo.lock
generated
2
Cargo.lock
generated
@ -5,7 +5,7 @@ version = 3
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[[package]]
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[[package]]
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name = "acpi_tables"
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name = "acpi_tables"
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version = "0.1.0"
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version = "0.1.0"
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source = "git+https://github.com/rust-vmm/acpi_tables?branch=main#05a609136387cc1cc9b499cee4320020325c263f"
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source = "git+https://github.com/rust-vmm/acpi_tables?branch=main#1029d22777f07b04849234bbe756da34a6df2913"
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dependencies = [
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dependencies = [
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"zerocopy 0.6.1",
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"zerocopy 0.6.1",
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]
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]
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@ -134,7 +134,7 @@ impl Aml for AcpiGedDevice {
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&aml::Name::new(
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&aml::Name::new(
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"_CRS".into(),
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"_CRS".into(),
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&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
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&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
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aml::AddressSpaceCachable::NotCacheable,
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aml::AddressSpaceCacheable::NotCacheable,
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true,
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true,
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self.address.0,
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self.address.0,
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self.address.0 + GED_DEVICE_ACPI_SIZE as u64 - 1,
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self.address.0 + GED_DEVICE_ACPI_SIZE as u64 - 1,
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3
fuzz/Cargo.lock
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3
fuzz/Cargo.lock
generated
@ -5,7 +5,7 @@ version = 3
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[[package]]
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[[package]]
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name = "acpi_tables"
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name = "acpi_tables"
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version = "0.1.0"
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version = "0.1.0"
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source = "git+https://github.com/rust-vmm/acpi_tables?branch=main#05a609136387cc1cc9b499cee4320020325c263f"
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source = "git+https://github.com/rust-vmm/acpi_tables?branch=main#1029d22777f07b04849234bbe756da34a6df2913"
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dependencies = [
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dependencies = [
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"zerocopy",
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"zerocopy",
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]
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]
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@ -1032,6 +1032,7 @@ dependencies = [
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"arch",
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"arch",
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"bitflags 2.3.3",
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"bitflags 2.3.3",
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"block",
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"block",
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"cfg-if",
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"devices",
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"devices",
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"epoll",
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"epoll",
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"event_monitor",
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"event_monitor",
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@ -2019,7 +2019,7 @@ impl Aml for CpuManager {
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&aml::Name::new(
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&aml::Name::new(
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"_CRS".into(),
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"_CRS".into(),
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&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
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&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
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aml::AddressSpaceCachable::NotCacheable,
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aml::AddressSpaceCacheable::NotCacheable,
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true,
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true,
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acpi_address.0,
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acpi_address.0,
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acpi_address.0 + CPU_MANAGER_ACPI_SIZE as u64 - 1,
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acpi_address.0 + CPU_MANAGER_ACPI_SIZE as u64 - 1,
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@ -4383,7 +4383,7 @@ impl Aml for DeviceManager {
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&aml::Name::new(
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&aml::Name::new(
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"_CRS".into(),
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"_CRS".into(),
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&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
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&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
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aml::AddressSpaceCachable::NotCacheable,
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aml::AddressSpaceCacheable::NotCacheable,
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true,
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true,
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self.acpi_address.0,
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self.acpi_address.0,
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self.acpi_address.0 + DEVICE_MANAGER_ACPI_SIZE as u64 - 1,
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self.acpi_address.0 + DEVICE_MANAGER_ACPI_SIZE as u64 - 1,
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@ -2331,7 +2331,7 @@ impl Aml for MemoryMethods {
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&aml::Name::new(
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&aml::Name::new(
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"MR64".into(),
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"MR64".into(),
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&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
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&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
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aml::AddressSpaceCachable::Cacheable,
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aml::AddressSpaceCacheable::Cacheable,
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true,
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true,
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0x0000_0000_0000_0000u64,
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0x0000_0000_0000_0000u64,
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0xFFFF_FFFF_FFFF_FFFEu64,
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0xFFFF_FFFF_FFFF_FFFEu64,
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@ -2414,7 +2414,7 @@ impl Aml for MemoryManager {
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&aml::Name::new(
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&aml::Name::new(
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"_CRS".into(),
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"_CRS".into(),
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&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
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&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
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aml::AddressSpaceCachable::NotCacheable,
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aml::AddressSpaceCacheable::NotCacheable,
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true,
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true,
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acpi_address.0,
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acpi_address.0,
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acpi_address.0 + MEMORY_MANAGER_ACPI_SIZE as u64 - 1,
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acpi_address.0 + MEMORY_MANAGER_ACPI_SIZE as u64 - 1,
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@ -2510,7 +2510,7 @@ impl Aml for MemoryManager {
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&aml::Name::new(
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&aml::Name::new(
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"_CRS".into(),
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"_CRS".into(),
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&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
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&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
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aml::AddressSpaceCachable::NotCacheable,
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aml::AddressSpaceCacheable::NotCacheable,
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true,
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true,
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min,
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min,
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max,
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max,
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@ -348,7 +348,7 @@ impl Aml for PciSegment {
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#[cfg(target_arch = "x86_64")]
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#[cfg(target_arch = "x86_64")]
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&aml::IO::new(0xcf8, 0xcf8, 1, 0x8),
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&aml::IO::new(0xcf8, 0xcf8, 1, 0x8),
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&aml::AddressSpace::new_memory(
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&aml::AddressSpace::new_memory(
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aml::AddressSpaceCachable::NotCacheable,
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aml::AddressSpaceCacheable::NotCacheable,
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true,
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true,
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layout::MEM_32BIT_DEVICES_START.0 as u32,
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layout::MEM_32BIT_DEVICES_START.0 as u32,
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(layout::MEM_32BIT_DEVICES_START.0 + layout::MEM_32BIT_DEVICES_SIZE - 1)
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(layout::MEM_32BIT_DEVICES_START.0 + layout::MEM_32BIT_DEVICES_SIZE - 1)
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@ -356,7 +356,7 @@ impl Aml for PciSegment {
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None,
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None,
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),
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),
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&aml::AddressSpace::new_memory(
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&aml::AddressSpace::new_memory(
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aml::AddressSpaceCachable::NotCacheable,
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aml::AddressSpaceCacheable::NotCacheable,
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true,
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true,
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self.start_of_device_area,
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self.start_of_device_area,
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self.end_of_device_area,
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self.end_of_device_area,
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@ -379,7 +379,7 @@ impl Aml for PciSegment {
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layout::PCI_MMIO_CONFIG_SIZE_PER_SEGMENT as u32,
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layout::PCI_MMIO_CONFIG_SIZE_PER_SEGMENT as u32,
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),
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),
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&aml::AddressSpace::new_memory(
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&aml::AddressSpace::new_memory(
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aml::AddressSpaceCachable::NotCacheable,
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aml::AddressSpaceCacheable::NotCacheable,
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true,
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true,
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self.start_of_device_area,
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self.start_of_device_area,
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self.end_of_device_area,
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self.end_of_device_area,
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