From 49b4fba2833bbe32748d22b59cc228aa81a37759 Mon Sep 17 00:00:00 2001
From: Sebastien Boeuf <sebastien.boeuf@intel.com>
Date: Mon, 29 Jun 2020 18:00:49 +0200
Subject: [PATCH] hypervisor: Retrieve list of supported MSRs

Add a new function to the hypervisor trait so that the caller can
retrieve the list of MSRs supported by this hypervisor.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
---
 hypervisor/src/hypervisor.rs     | 12 +++++++++++-
 hypervisor/src/kvm/mod.rs        | 11 ++++++++++-
 hypervisor/src/kvm/x86_64/mod.rs |  2 +-
 3 files changed, 22 insertions(+), 3 deletions(-)

diff --git a/hypervisor/src/hypervisor.rs b/hypervisor/src/hypervisor.rs
index e8a2c877c..21105b926 100644
--- a/hypervisor/src/hypervisor.rs
+++ b/hypervisor/src/hypervisor.rs
@@ -9,7 +9,7 @@
 //
 use crate::vm::Vm;
 #[cfg(target_arch = "x86_64")]
-use crate::x86_64::CpuId;
+use crate::x86_64::{CpuId, MsrList};
 #[cfg(target_arch = "x86_64")]
 use kvm_ioctls::Cap;
 use std::sync::Arc;
@@ -55,6 +55,11 @@ pub enum HypervisorError {
     ///
     #[error("Failed to get number of max vcpus: {0}")]
     GetCpuId(#[source] anyhow::Error),
+    ///
+    /// Failed to retrieve list of MSRs.
+    ///
+    #[error("Failed to get the list of supported MSRs: {0}")]
+    GetMsrList(#[source] anyhow::Error),
 }
 
 ///
@@ -103,4 +108,9 @@ pub trait Hypervisor: Send + Sync {
     /// Check particular extensions if any
     ///
     fn check_required_extensions(&self) -> Result<()>;
+    #[cfg(target_arch = "x86_64")]
+    ///
+    /// Retrieve the list of MSRs supported by the hypervisor.
+    ///
+    fn get_msr_list(&self) -> Result<MsrList>;
 }
diff --git a/hypervisor/src/kvm/mod.rs b/hypervisor/src/kvm/mod.rs
index fb401ca7a..85c23f82a 100644
--- a/hypervisor/src/kvm/mod.rs
+++ b/hypervisor/src/kvm/mod.rs
@@ -36,7 +36,7 @@ pub use x86_64::{
 };
 
 #[cfg(target_arch = "x86_64")]
-use kvm_bindings::{kvm_enable_cap, KVM_CAP_SPLIT_IRQCHIP};
+use kvm_bindings::{kvm_enable_cap, MsrList, KVM_CAP_SPLIT_IRQCHIP};
 
 #[cfg(target_arch = "x86_64")]
 use crate::arch::x86::NUM_IOAPIC_PINS;
@@ -333,6 +333,15 @@ impl hypervisor::Hypervisor for KvmHypervisor {
             .get_supported_cpuid(kvm_bindings::KVM_MAX_CPUID_ENTRIES)
             .map_err(|e| hypervisor::HypervisorError::GetCpuId(e.into()))
     }
+    #[cfg(target_arch = "x86_64")]
+    ///
+    /// Retrieve the list of MSRs supported by KVM.
+    ///
+    fn get_msr_list(&self) -> hypervisor::Result<MsrList> {
+        self.kvm
+            .get_msr_index_list()
+            .map_err(|e| hypervisor::HypervisorError::GetMsrList(e.into()))
+    }
 }
 /// Vcpu struct for KVM
 pub struct KvmVcpu {
diff --git a/hypervisor/src/kvm/x86_64/mod.rs b/hypervisor/src/kvm/x86_64/mod.rs
index f2a0373d1..27ae88b80 100644
--- a/hypervisor/src/kvm/x86_64/mod.rs
+++ b/hypervisor/src/kvm/x86_64/mod.rs
@@ -24,7 +24,7 @@ pub use {
     kvm_bindings::kvm_segment as SegmentRegister, kvm_bindings::kvm_sregs as SpecialRegisters,
     kvm_bindings::kvm_vcpu_events as VcpuEvents,
     kvm_bindings::kvm_xcrs as ExtendedControlRegisters, kvm_bindings::kvm_xsave as Xsave,
-    kvm_bindings::CpuId, kvm_bindings::Msrs as MsrEntries,
+    kvm_bindings::CpuId, kvm_bindings::MsrList, kvm_bindings::Msrs as MsrEntries,
 };
 
 pub const KVM_TSS_ADDRESS: GuestAddress = GuestAddress(0xfffb_d000);