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vmm: Detect and handle AMD SME (Secure Memory Encryption)
Some physical address bits may become reserved in page table when SME is enabled on AMD platform. Guest will trigger a reserved bit violation page fault in this case due to write these reserved bits to 1 in page table. We need reduce the reserved bits to get the right physical address range. Signed-off-by: Qiu Wenbo <qiuwenbo@phytium.com.cn>
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@ -213,9 +213,23 @@ fn get_host_cpu_phys_bits() -> u8 {
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unsafe {
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let leaf = x86_64::__cpuid(0x8000_0000);
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// Detect and handle AMD SME (Secure Memory Encryption) properly.
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// Some physical address bits may become reserved when the feature is enabled.
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// See AMD64 Architecture Programmer's Manual Volume 2, Section 7.10.1
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let reduced = if leaf.eax >= 0x8000_001f
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&& leaf.ebx == 0x6874_7541 // Vendor ID: AuthenticAMD
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&& leaf.ecx == 0x444d_4163
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&& leaf.edx == 0x6974_6e65
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&& x86_64::__cpuid(0x8000_001f).eax & 0x1 != 0
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{
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(x86_64::__cpuid(0x8000_001f).ebx >> 6) & 0x3f
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} else {
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0
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};
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if leaf.eax >= 0x8000_0008 {
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let leaf = x86_64::__cpuid(0x8000_0008);
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(leaf.eax & 0xff) as u8
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((leaf.eax & 0xff) - reduced) as u8
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} else {
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36
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}
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