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hypervisor: Add api to set sev control register

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This register configures the SEV feature control
state on a virtual processor.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
Signed-off-by: Muminul Islam <muislam@microsoft.com>
This commit is contained in:
Muminul Islam 2024-01-18 16:29:46 -08:00 committed by Bo Chen
parent 3993663e5c
commit 5368ff28da
2 changed files with 22 additions and 0 deletions
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10
hypervisor/src/cpu.rs
View File

@ -272,6 +272,12 @@ pub enum HypervisorCpuError {
///
#[error("Failed to get CPUID entries: {0}")]
GetCpuidVales(#[source] anyhow::Error),
///
/// Setting SEV control register error
///
#[cfg(feature = "sev_snp")]
#[error("Failed to set sev control register: {0}")]
SetSevControlRegister(#[source] anyhow::Error),
}
#[derive(Debug)]
@ -495,4 +501,8 @@ pub trait Vcpu: Send + Sync {
) -> Result<[u32; 4]> {
unimplemented!()
}
#[cfg(feature = "mshv")]
fn set_sev_control_register(&self, _reg: u64) -> Result<()> {
unimplemented!()
}
}

12
hypervisor/src/mshv/mod.rs
View File

@ -1241,6 +1241,18 @@ impl cpu::Vcpu for MshvVcpu {
]
.to_vec()
}
///
/// Sets the AMD specific vcpu's sev control register.
///
#[cfg(feature = "sev_snp")]
fn set_sev_control_register(&self, vmsa_pfn: u64) -> cpu::Result<()> {
let sev_control_reg = snp::get_sev_control_register(vmsa_pfn);
self.fd
.set_sev_control_register(sev_control_reg)
.map_err(|e| cpu::HypervisorCpuError::SetSevControlRegister(e.into()))
}
}
impl MshvVcpu {