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vm-allocator: Introduce RISC-V architecture
Provide implementation for GSI allocator to work on riscv64 architecture, and doc comment for riscv64 as well. Signed-off-by: Ruoqing He <heruoqing@iscas.ac.cn>
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@ -62,7 +62,7 @@ impl GsiAllocator {
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allocator
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allocator
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}
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}
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#[cfg(target_arch = "aarch64")]
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#[cfg(any(target_arch = "aarch64", target_arch = "riscv64"))]
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/// New GSI allocator
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/// New GSI allocator
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pub fn new() -> Self {
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pub fn new() -> Self {
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GsiAllocator {
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GsiAllocator {
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@ -97,7 +97,7 @@ impl GsiAllocator {
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Ok(irq)
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Ok(irq)
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}
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}
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#[cfg(target_arch = "aarch64")]
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#[cfg(any(target_arch = "aarch64", target_arch = "riscv64"))]
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/// Allocate an IRQ
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/// Allocate an IRQ
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pub fn allocate_irq(&mut self) -> Result<u32> {
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pub fn allocate_irq(&mut self) -> Result<u32> {
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let irq = self.next_irq;
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let irq = self.next_irq;
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@ -106,7 +106,7 @@ impl GsiAllocator {
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}
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}
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}
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}
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#[cfg(target_arch = "aarch64")]
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#[cfg(any(target_arch = "aarch64", target_arch = "riscv64"))]
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impl Default for GsiAllocator {
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impl Default for GsiAllocator {
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fn default() -> Self {
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fn default() -> Self {
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GsiAllocator::new()
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GsiAllocator::new()
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@ -22,7 +22,7 @@ use crate::page_size::get_page_size;
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/// ```
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/// ```
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/// # #[cfg(target_arch = "x86_64")]
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/// # #[cfg(target_arch = "x86_64")]
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/// # use vm_allocator::{GsiApic, SystemAllocator};
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/// # use vm_allocator::{GsiApic, SystemAllocator};
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/// # #[cfg(target_arch = "aarch64")]
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/// # #[cfg(any(target_arch = "aarch64", target_arch = "riscv64"))]
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/// # use vm_allocator::SystemAllocator;
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/// # use vm_allocator::SystemAllocator;
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/// # use vm_memory::{Address, GuestAddress, GuestUsize};
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/// # use vm_memory::{Address, GuestAddress, GuestUsize};
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/// let mut allocator = SystemAllocator::new(
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/// let mut allocator = SystemAllocator::new(
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@ -34,10 +34,14 @@ use crate::page_size::get_page_size;
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/// assert_eq!(allocator.allocate_irq(), Some(5));
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/// assert_eq!(allocator.allocate_irq(), Some(5));
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/// #[cfg(target_arch = "aarch64")]
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/// #[cfg(target_arch = "aarch64")]
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/// assert_eq!(allocator.allocate_irq(), Some(32));
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/// assert_eq!(allocator.allocate_irq(), Some(32));
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/// #[cfg(target_arch = "riscv64")]
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/// assert_eq!(allocator.allocate_irq(), Some(0));
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/// #[cfg(target_arch = "x86_64")]
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/// #[cfg(target_arch = "x86_64")]
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/// assert_eq!(allocator.allocate_irq(), Some(6));
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/// assert_eq!(allocator.allocate_irq(), Some(6));
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/// #[cfg(target_arch = "aarch64")]
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/// #[cfg(target_arch = "aarch64")]
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/// assert_eq!(allocator.allocate_irq(), Some(33));
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/// assert_eq!(allocator.allocate_irq(), Some(33));
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/// #[cfg(target_arch = "riscv64")]
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/// assert_eq!(allocator.allocate_irq(), Some(1));
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/// assert_eq!(allocator.allocate_platform_mmio_addresses(None, 0x1000, Some(0x1000)), Some(GuestAddress(0x1fff_f000)));
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/// assert_eq!(allocator.allocate_platform_mmio_addresses(None, 0x1000, Some(0x1000)), Some(GuestAddress(0x1fff_f000)));
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///
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///
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/// ```
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/// ```
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@ -74,7 +78,7 @@ impl SystemAllocator {
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)?,
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)?,
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#[cfg(target_arch = "x86_64")]
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#[cfg(target_arch = "x86_64")]
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gsi_allocator: GsiAllocator::new(apics),
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gsi_allocator: GsiAllocator::new(apics),
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#[cfg(target_arch = "aarch64")]
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#[cfg(any(target_arch = "aarch64", target_arch = "riscv64"))]
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gsi_allocator: GsiAllocator::new(),
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gsi_allocator: GsiAllocator::new(),
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})
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})
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}
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}
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