mirror of
https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2024-08-20 06:51:15 +00:00
device: Add AArch64 RTC PL031 implementation
This commit adds the implementation for the AArch64 PL031 Real Time Clock (RTC) that provides a long time base counter. This is achieved by generating an interrupt signal after counting a programmed number of cycles of a real-time clock input. The AArch64 guest VM of the cloud-hypervisor will use this RTC to sync the time in itself. Signed-off-by: Henry Wang <Henry.Wang@arm.com>
This commit is contained in:
parent
625bab69bd
commit
5f9e079a03
@ -10,6 +10,8 @@ mod cmos;
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#[cfg(feature = "fwdebug")]
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#[cfg(feature = "fwdebug")]
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mod fwdebug;
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mod fwdebug;
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mod i8042;
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mod i8042;
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#[cfg(target_arch = "aarch64")]
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mod rtc_pl031;
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mod serial;
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mod serial;
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#[cfg(feature = "cmos")]
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#[cfg(feature = "cmos")]
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@ -18,3 +20,6 @@ pub use self::cmos::Cmos;
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pub use self::fwdebug::FwDebugDevice;
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pub use self::fwdebug::FwDebugDevice;
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pub use self::i8042::I8042Device;
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pub use self::i8042::I8042Device;
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pub use self::serial::Serial;
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pub use self::serial::Serial;
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#[cfg(target_arch = "aarch64")]
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pub use self::rtc_pl031::RTC;
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626
devices/src/legacy/rtc_pl031.rs
Normal file
626
devices/src/legacy/rtc_pl031.rs
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@ -0,0 +1,626 @@
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// Copyright 2020 Arm Limited (or its affiliates). All rights reserved.
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// Copyright 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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// SPDX-License-Identifier: Apache-2.0
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//! ARM PL031 Real Time Clock
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//!
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//! This module implements a PL031 Real Time Clock (RTC) that provides to provides long time base counter.
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//! This is achieved by generating an interrupt signal after counting for a programmed number of cycles of
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//! a real-time clock input.
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//!
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use std::fmt;
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use std::sync::Arc;
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use std::time::Instant;
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use std::{io, result};
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use crate::BusDevice;
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use vm_device::interrupt::InterruptSourceGroup;
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// As you can see in https://static.docs.arm.com/ddi0224/c/real_time_clock_pl031_r1p3_technical_reference_manual_DDI0224C.pdf
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// at section 3.2 Summary of RTC registers, the total size occupied by this device is 0x000 -> 0xFFC + 4 = 0x1000.
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// From 0x0 to 0x1C we have following registers:
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const RTCDR: u64 = 0x0; // Data Register.
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const RTCMR: u64 = 0x4; // Match Register.
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const RTCLR: u64 = 0x8; // Load Regiser.
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const RTCCR: u64 = 0xc; // Control Register.
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const RTCIMSC: u64 = 0x10; // Interrupt Mask Set or Clear Register.
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const RTCRIS: u64 = 0x14; // Raw Interrupt Status.
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const RTCMIS: u64 = 0x18; // Masked Interrupt Status.
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const RTCICR: u64 = 0x1c; // Interrupt Clear Register.
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// From 0x020 to 0xFDC => reserved space.
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// From 0xFE0 to 0x1000 => Peripheral and PrimeCell Identification Registers which are Read Only registers.
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// AMBA standard devices have CIDs (Cell IDs) and PIDs (Peripheral IDs). The linux kernel will look for these in order to assert the identity
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// of these devices (i.e look at the `amba_device_try_add` function).
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// We are putting the expected values (look at 'Reset value' column from above mentioned document) in an array.
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const PL031_ID: [u8; 8] = [0x31, 0x10, 0x14, 0x00, 0x0d, 0xf0, 0x05, 0xb1];
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// We are only interested in the margins.
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const AMBA_ID_LOW: u64 = 0xFE0;
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const AMBA_ID_HIGH: u64 = 0x1000;
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/// Constant to convert seconds to nanoseconds.
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pub const NANOS_PER_SECOND: u64 = 1_000_000_000;
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#[allow(unused_macros)]
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macro_rules! generate_read_fn {
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($fn_name: ident, $data_type: ty, $byte_type: ty, $type_size: expr, $endian_type: ident) => {
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#[allow(dead_code)]
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pub fn $fn_name(input: &[$byte_type]) -> $data_type {
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assert!($type_size == std::mem::size_of::<$data_type>());
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let mut array = [0u8; $type_size];
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for (byte, read) in array.iter_mut().zip(input.iter().cloned()) {
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*byte = read as u8;
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}
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<$data_type>::$endian_type(array)
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}
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};
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}
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#[allow(unused_macros)]
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macro_rules! generate_write_fn {
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($fn_name: ident, $data_type: ty, $byte_type: ty, $endian_type: ident) => {
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#[allow(dead_code)]
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pub fn $fn_name(buf: &mut [$byte_type], n: $data_type) {
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for (byte, read) in buf
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.iter_mut()
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.zip(<$data_type>::$endian_type(n).iter().cloned())
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{
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*byte = read as $byte_type;
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}
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}
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};
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}
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generate_read_fn!(read_le_u16, u16, u8, 2, from_le_bytes);
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generate_read_fn!(read_le_u32, u32, u8, 4, from_le_bytes);
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generate_read_fn!(read_le_u64, u64, u8, 8, from_le_bytes);
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generate_read_fn!(read_le_i32, i32, i8, 4, from_le_bytes);
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generate_read_fn!(read_be_u16, u16, u8, 2, from_be_bytes);
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generate_read_fn!(read_be_u32, u32, u8, 4, from_be_bytes);
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generate_write_fn!(write_le_u16, u16, u8, to_le_bytes);
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generate_write_fn!(write_le_u32, u32, u8, to_le_bytes);
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generate_write_fn!(write_le_u64, u64, u8, to_le_bytes);
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generate_write_fn!(write_le_i32, i32, i8, to_le_bytes);
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generate_write_fn!(write_be_u16, u16, u8, to_be_bytes);
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generate_write_fn!(write_be_u32, u32, u8, to_be_bytes);
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#[derive(Debug)]
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pub enum Error {
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BadWriteOffset(u64),
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InterruptFailure(io::Error),
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}
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impl fmt::Display for Error {
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fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
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match self {
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Error::BadWriteOffset(offset) => write!(f, "Bad Write Offset: {}", offset),
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Error::InterruptFailure(e) => write!(f, "Failed to trigger interrupt: {}", e),
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}
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}
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}
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type Result<T> = result::Result<T, Error>;
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/// Wrapper over `libc::clockid_t` to specify Linux Kernel clock source.
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pub enum ClockType {
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/// Equivalent to `libc::CLOCK_MONOTONIC`.
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Monotonic,
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/// Equivalent to `libc::CLOCK_REALTIME`.
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#[allow(dead_code)]
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Real,
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/// Equivalent to `libc::CLOCK_PROCESS_CPUTIME_ID`.
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ProcessCpu,
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/// Equivalent to `libc::CLOCK_THREAD_CPUTIME_ID`.
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#[allow(dead_code)]
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ThreadCpu,
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}
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impl Into<libc::clockid_t> for ClockType {
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fn into(self) -> libc::clockid_t {
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match self {
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ClockType::Monotonic => libc::CLOCK_MONOTONIC,
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ClockType::Real => libc::CLOCK_REALTIME,
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ClockType::ProcessCpu => libc::CLOCK_PROCESS_CPUTIME_ID,
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ClockType::ThreadCpu => libc::CLOCK_THREAD_CPUTIME_ID,
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}
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}
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}
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/// Structure representing the date in local time with nanosecond precision.
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pub struct LocalTime {
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/// Seconds in current minute.
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sec: i32,
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/// Minutes in current hour.
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min: i32,
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/// Hours in current day, 24H format.
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hour: i32,
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/// Days in current month.
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mday: i32,
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/// Months in current year.
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mon: i32,
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/// Years passed since 1900 BC.
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year: i32,
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/// Nanoseconds in current second.
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nsec: i64,
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}
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impl LocalTime {
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/// Returns the [LocalTime](struct.LocalTime.html) structure for the calling moment.
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#[allow(dead_code)]
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pub fn now() -> LocalTime {
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let mut timespec = libc::timespec {
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tv_sec: 0,
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tv_nsec: 0,
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};
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let mut tm: libc::tm = libc::tm {
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tm_sec: 0,
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tm_min: 0,
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tm_hour: 0,
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tm_mday: 0,
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tm_mon: 0,
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tm_year: 0,
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tm_wday: 0,
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tm_yday: 0,
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tm_isdst: 0,
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tm_gmtoff: 0,
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tm_zone: std::ptr::null(),
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};
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// Safe because the parameters are valid.
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unsafe {
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libc::clock_gettime(libc::CLOCK_REALTIME, &mut timespec);
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libc::localtime_r(×pec.tv_sec, &mut tm);
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}
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LocalTime {
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sec: tm.tm_sec,
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min: tm.tm_min,
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hour: tm.tm_hour,
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mday: tm.tm_mday,
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mon: tm.tm_mon,
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year: tm.tm_year,
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nsec: timespec.tv_nsec,
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}
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}
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}
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impl fmt::Display for LocalTime {
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fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
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write!(
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f,
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"{}-{:02}-{:02}T{:02}:{:02}:{:02}.{:09}",
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self.year + 1900,
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self.mon + 1,
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self.mday,
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self.hour,
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self.min,
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self.sec,
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self.nsec
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)
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}
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}
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/// Holds a micro-second resolution timestamp with both the real time and cpu time.
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#[derive(Clone)]
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pub struct TimestampUs {
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/// Real time in microseconds.
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pub time_us: u64,
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/// Cpu time in microseconds.
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pub cputime_us: u64,
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}
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impl Default for TimestampUs {
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fn default() -> TimestampUs {
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TimestampUs {
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time_us: get_time(ClockType::Monotonic) / 1000,
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cputime_us: get_time(ClockType::ProcessCpu) / 1000,
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}
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}
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}
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/// Returns a timestamp in nanoseconds from a monotonic clock.
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///
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/// Uses `_rdstc` on `x86_64` and [`get_time`](fn.get_time.html) on other architectures.
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#[allow(dead_code)]
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pub fn timestamp_cycles() -> u64 {
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#[cfg(target_arch = "x86_64")]
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// Safe because there's nothing that can go wrong with this call.
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unsafe {
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std::arch::x86_64::_rdtsc() as u64
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}
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#[cfg(not(target_arch = "x86_64"))]
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{
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get_time(ClockType::Monotonic)
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}
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}
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/// Returns a timestamp in nanoseconds based on the provided clock type.
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///
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/// # Arguments
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///
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/// * `clock_type` - Identifier of the Linux Kernel clock on which to act.
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pub fn get_time(clock_type: ClockType) -> u64 {
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let mut time_struct = libc::timespec {
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tv_sec: 0,
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tv_nsec: 0,
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};
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// Safe because the parameters are valid.
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unsafe { libc::clock_gettime(clock_type.into(), &mut time_struct) };
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seconds_to_nanoseconds(time_struct.tv_sec).unwrap() as u64 + (time_struct.tv_nsec as u64)
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}
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/// Converts a timestamp in seconds to an equivalent one in nanoseconds.
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/// Returns `None` if the conversion overflows.
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///
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/// # Arguments
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///
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/// * `value` - Timestamp in seconds.
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pub fn seconds_to_nanoseconds(value: i64) -> Option<i64> {
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value.checked_mul(NANOS_PER_SECOND as i64)
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}
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/// A RTC device following the PL031 specification..
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pub struct RTC {
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previous_now: Instant,
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tick_offset: i64,
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// This is used for implementing the RTC alarm. However, in Firecracker we do not need it.
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match_value: u32,
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// Writes to this register load an update value into the RTC.
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load: u32,
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imsc: u32,
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ris: u32,
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interrupt: Arc<Box<dyn InterruptSourceGroup>>,
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}
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impl RTC {
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/// Constructs an AMBA PL031 RTC device.
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pub fn new(interrupt: Arc<Box<dyn InterruptSourceGroup>>) -> RTC {
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RTC {
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// This is used only for duration measuring purposes.
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previous_now: Instant::now(),
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tick_offset: get_time(ClockType::Real) as i64,
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match_value: 0,
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load: 0,
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imsc: 0,
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ris: 0,
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interrupt,
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}
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}
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fn trigger_interrupt(&mut self) -> Result<()> {
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self.interrupt.trigger(0).map_err(Error::InterruptFailure)?;
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Ok(())
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}
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fn get_time(&self) -> u32 {
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let ts = (self.tick_offset as i128)
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+ (Instant::now().duration_since(self.previous_now).as_nanos() as i128);
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(ts / NANOS_PER_SECOND as i128) as u32
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}
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fn handle_write(&mut self, offset: u64, val: u32) -> Result<()> {
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match offset {
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RTCMR => {
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// The MR register is used for implementing the RTC alarm. A real time clock alarm is
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// a feature that can be used to allow a computer to 'wake up' after shut down to execute
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// tasks every day or on a certain day. It can sometimes be found in the 'Power Management'
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// section of a motherboard's BIOS setup. This is functionality that extends beyond
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// Firecracker intended use. However, we increment a metric just in case.
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self.match_value = val;
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}
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RTCLR => {
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self.load = val;
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self.previous_now = Instant::now();
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// If the unwrap fails, then the internal value of the clock has been corrupted and
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// we want to terminate the execution of the process.
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self.tick_offset = seconds_to_nanoseconds(i64::from(val)).unwrap();
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}
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RTCIMSC => {
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self.imsc = val & 1;
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self.trigger_interrupt()?;
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}
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RTCICR => {
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// As per above mentioned doc, the interrupt is cleared by writing any data value to
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// the Interrupt Clear Register.
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self.ris = 0;
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self.trigger_interrupt()?;
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}
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RTCCR => (), // ignore attempts to turn off the timer.
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o => {
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return Err(Error::BadWriteOffset(o));
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}
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}
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Ok(())
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}
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}
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impl BusDevice for RTC {
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||||||
|
fn read(&mut self, _base: u64, offset: u64, data: &mut [u8]) {
|
||||||
|
let v;
|
||||||
|
let mut read_ok = true;
|
||||||
|
|
||||||
|
if offset < AMBA_ID_HIGH && offset >= AMBA_ID_LOW {
|
||||||
|
let index = ((offset - AMBA_ID_LOW) >> 2) as usize;
|
||||||
|
v = u32::from(PL031_ID[index]);
|
||||||
|
} else {
|
||||||
|
v = match offset {
|
||||||
|
RTCDR => self.get_time(),
|
||||||
|
RTCMR => {
|
||||||
|
// Even though we are not implementing RTC alarm we return the last value
|
||||||
|
self.match_value
|
||||||
|
}
|
||||||
|
RTCLR => self.load,
|
||||||
|
RTCCR => 1, // RTC is always enabled.
|
||||||
|
RTCIMSC => self.imsc,
|
||||||
|
RTCRIS => self.ris,
|
||||||
|
RTCMIS => self.ris & self.imsc,
|
||||||
|
_ => {
|
||||||
|
read_ok = false;
|
||||||
|
0
|
||||||
|
}
|
||||||
|
};
|
||||||
|
}
|
||||||
|
if read_ok && data.len() <= 4 {
|
||||||
|
write_le_u32(data, v);
|
||||||
|
} else {
|
||||||
|
warn!(
|
||||||
|
"Invalid RTC PL031 read: offset {}, data length {}",
|
||||||
|
offset,
|
||||||
|
data.len()
|
||||||
|
);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn write(&mut self, _base: u64, offset: u64, data: &[u8]) {
|
||||||
|
if data.len() <= 4 {
|
||||||
|
let v = read_le_u32(&data[..]);
|
||||||
|
if let Err(e) = self.handle_write(offset, v) {
|
||||||
|
warn!("Failed to write to RTC PL031 device: {}", e);
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
warn!(
|
||||||
|
"Invalid RTC PL031 write: offset {}, data length {}",
|
||||||
|
offset,
|
||||||
|
data.len()
|
||||||
|
);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[cfg(test)]
|
||||||
|
mod tests {
|
||||||
|
use super::*;
|
||||||
|
use std::sync::Arc;
|
||||||
|
use vm_device::interrupt::{InterruptIndex, InterruptSourceConfig};
|
||||||
|
use vmm_sys_util::eventfd::EventFd;
|
||||||
|
|
||||||
|
const LEGACY_RTC_MAPPED_IO_START: u64 = 0x0901_0000;
|
||||||
|
|
||||||
|
#[test]
|
||||||
|
fn test_get_time() {
|
||||||
|
for _ in 0..1000 {
|
||||||
|
assert!(get_time(ClockType::Monotonic) <= get_time(ClockType::Monotonic));
|
||||||
|
}
|
||||||
|
|
||||||
|
for _ in 0..1000 {
|
||||||
|
assert!(get_time(ClockType::ProcessCpu) <= get_time(ClockType::ProcessCpu));
|
||||||
|
}
|
||||||
|
|
||||||
|
for _ in 0..1000 {
|
||||||
|
assert!(get_time(ClockType::ThreadCpu) <= get_time(ClockType::ThreadCpu));
|
||||||
|
}
|
||||||
|
|
||||||
|
assert_ne!(get_time(ClockType::Real), 0);
|
||||||
|
}
|
||||||
|
|
||||||
|
#[test]
|
||||||
|
fn test_local_time_display() {
|
||||||
|
let local_time = LocalTime {
|
||||||
|
sec: 30,
|
||||||
|
min: 15,
|
||||||
|
hour: 10,
|
||||||
|
mday: 4,
|
||||||
|
mon: 6,
|
||||||
|
year: 119,
|
||||||
|
nsec: 123_456_789,
|
||||||
|
};
|
||||||
|
assert_eq!(
|
||||||
|
String::from("2019-07-04T10:15:30.123456789"),
|
||||||
|
local_time.to_string()
|
||||||
|
);
|
||||||
|
|
||||||
|
let local_time = LocalTime {
|
||||||
|
sec: 5,
|
||||||
|
min: 5,
|
||||||
|
hour: 5,
|
||||||
|
mday: 23,
|
||||||
|
mon: 7,
|
||||||
|
year: 44,
|
||||||
|
nsec: 123,
|
||||||
|
};
|
||||||
|
assert_eq!(
|
||||||
|
String::from("1944-08-23T05:05:05.000000123"),
|
||||||
|
local_time.to_string()
|
||||||
|
);
|
||||||
|
|
||||||
|
let local_time = LocalTime::now();
|
||||||
|
assert!(local_time.mon >= 0 && local_time.mon <= 11);
|
||||||
|
}
|
||||||
|
|
||||||
|
#[test]
|
||||||
|
fn test_seconds_to_nanoseconds() {
|
||||||
|
assert_eq!(
|
||||||
|
seconds_to_nanoseconds(100).unwrap() as u64,
|
||||||
|
100 * NANOS_PER_SECOND
|
||||||
|
);
|
||||||
|
|
||||||
|
assert!(seconds_to_nanoseconds(9_223_372_037).is_none());
|
||||||
|
}
|
||||||
|
|
||||||
|
struct TestInterrupt {
|
||||||
|
event_fd: EventFd,
|
||||||
|
}
|
||||||
|
|
||||||
|
impl InterruptSourceGroup for TestInterrupt {
|
||||||
|
fn trigger(&self, _index: InterruptIndex) -> result::Result<(), std::io::Error> {
|
||||||
|
self.event_fd.write(1)
|
||||||
|
}
|
||||||
|
|
||||||
|
fn update(
|
||||||
|
&self,
|
||||||
|
_index: InterruptIndex,
|
||||||
|
_config: InterruptSourceConfig,
|
||||||
|
) -> result::Result<(), std::io::Error> {
|
||||||
|
Ok(())
|
||||||
|
}
|
||||||
|
|
||||||
|
fn notifier(&self, _index: InterruptIndex) -> Option<&EventFd> {
|
||||||
|
Some(&self.event_fd)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl TestInterrupt {
|
||||||
|
fn new(event_fd: EventFd) -> Self {
|
||||||
|
TestInterrupt { event_fd }
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[test]
|
||||||
|
fn test_rtc_read_write_and_event() {
|
||||||
|
let intr_evt = EventFd::new(libc::EFD_NONBLOCK).unwrap();
|
||||||
|
|
||||||
|
let mut rtc = RTC::new(Arc::new(Box::new(TestInterrupt::new(
|
||||||
|
intr_evt.try_clone().unwrap(),
|
||||||
|
))));
|
||||||
|
let mut data = [0; 4];
|
||||||
|
|
||||||
|
// Read and write to the MR register.
|
||||||
|
write_le_u32(&mut data, 123);
|
||||||
|
rtc.write(LEGACY_RTC_MAPPED_IO_START, RTCMR, &mut data);
|
||||||
|
rtc.read(LEGACY_RTC_MAPPED_IO_START, RTCMR, &mut data);
|
||||||
|
let v = read_le_u32(&data[..]);
|
||||||
|
assert_eq!(v, 123);
|
||||||
|
|
||||||
|
// Read and write to the LR register.
|
||||||
|
let v = get_time(ClockType::Real);
|
||||||
|
write_le_u32(&mut data, (v / NANOS_PER_SECOND) as u32);
|
||||||
|
let previous_now_before = rtc.previous_now;
|
||||||
|
rtc.write(LEGACY_RTC_MAPPED_IO_START, RTCLR, &mut data);
|
||||||
|
|
||||||
|
assert!(rtc.previous_now > previous_now_before);
|
||||||
|
|
||||||
|
rtc.read(LEGACY_RTC_MAPPED_IO_START, RTCLR, &mut data);
|
||||||
|
let v_read = read_le_u32(&data[..]);
|
||||||
|
assert_eq!((v / NANOS_PER_SECOND) as u32, v_read);
|
||||||
|
|
||||||
|
// Read and write to IMSC register.
|
||||||
|
// Test with non zero value.
|
||||||
|
let non_zero = 1;
|
||||||
|
write_le_u32(&mut data, non_zero);
|
||||||
|
rtc.write(LEGACY_RTC_MAPPED_IO_START, RTCIMSC, &mut data);
|
||||||
|
// The interrupt line should be on.
|
||||||
|
assert!(rtc.interrupt.notifier(0).unwrap().read().unwrap() == 1);
|
||||||
|
rtc.read(LEGACY_RTC_MAPPED_IO_START, RTCIMSC, &mut data);
|
||||||
|
let v = read_le_u32(&data[..]);
|
||||||
|
assert_eq!(non_zero & 1, v);
|
||||||
|
|
||||||
|
// Now test with 0.
|
||||||
|
write_le_u32(&mut data, 0);
|
||||||
|
rtc.write(LEGACY_RTC_MAPPED_IO_START, RTCIMSC, &mut data);
|
||||||
|
rtc.read(LEGACY_RTC_MAPPED_IO_START, RTCIMSC, &mut data);
|
||||||
|
let v = read_le_u32(&data[..]);
|
||||||
|
assert_eq!(0, v);
|
||||||
|
|
||||||
|
// Read and write to the ICR register.
|
||||||
|
write_le_u32(&mut data, 1);
|
||||||
|
rtc.write(LEGACY_RTC_MAPPED_IO_START, RTCICR, &mut data);
|
||||||
|
// The interrupt line should be on.
|
||||||
|
assert!(rtc.interrupt.notifier(0).unwrap().read().unwrap() > 1);
|
||||||
|
let v_before = read_le_u32(&data[..]);
|
||||||
|
|
||||||
|
rtc.read(LEGACY_RTC_MAPPED_IO_START, RTCICR, &mut data);
|
||||||
|
let v = read_le_u32(&data[..]);
|
||||||
|
// ICR is a write only register. Data received should stay equal to data sent.
|
||||||
|
assert_eq!(v, v_before);
|
||||||
|
|
||||||
|
// Attempts to turn off the RTC should not go through.
|
||||||
|
write_le_u32(&mut data, 0);
|
||||||
|
rtc.write(LEGACY_RTC_MAPPED_IO_START, RTCCR, &mut data);
|
||||||
|
rtc.read(LEGACY_RTC_MAPPED_IO_START, RTCCR, &mut data);
|
||||||
|
let v = read_le_u32(&data[..]);
|
||||||
|
assert_eq!(v, 1);
|
||||||
|
|
||||||
|
// Attempts to write beyond the writable space. Using here the space used to read
|
||||||
|
// the CID and PID from.
|
||||||
|
write_le_u32(&mut data, 0);
|
||||||
|
rtc.write(LEGACY_RTC_MAPPED_IO_START, AMBA_ID_LOW, &mut data);
|
||||||
|
// However, reading from the AMBA_ID_LOW should succeed upon read.
|
||||||
|
|
||||||
|
let mut data = [0; 4];
|
||||||
|
rtc.read(LEGACY_RTC_MAPPED_IO_START, AMBA_ID_LOW, &mut data);
|
||||||
|
let index = AMBA_ID_LOW + 3;
|
||||||
|
assert_eq!(data[0], PL031_ID[((index - AMBA_ID_LOW) >> 2) as usize]);
|
||||||
|
}
|
||||||
|
|
||||||
|
macro_rules! byte_order_test_read_write {
|
||||||
|
($test_name: ident, $write_fn_name: ident, $read_fn_name: ident, $is_be: expr, $data_type: ty) => {
|
||||||
|
#[test]
|
||||||
|
fn $test_name() {
|
||||||
|
#[allow(overflowing_literals)]
|
||||||
|
let test_cases = [
|
||||||
|
(
|
||||||
|
0x0123_4567_89AB_CDEF as u64,
|
||||||
|
[0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef],
|
||||||
|
),
|
||||||
|
(
|
||||||
|
0x0000_0000_0000_0000 as u64,
|
||||||
|
[0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00],
|
||||||
|
),
|
||||||
|
(
|
||||||
|
0x1923_2345_ABF3_CCD4 as u64,
|
||||||
|
[0x19, 0x23, 0x23, 0x45, 0xAB, 0xF3, 0xCC, 0xD4],
|
||||||
|
),
|
||||||
|
(
|
||||||
|
0x0FF0_0FF0_0FF0_0FF0 as u64,
|
||||||
|
[0x0F, 0xF0, 0x0F, 0xF0, 0x0F, 0xF0, 0x0F, 0xF0],
|
||||||
|
),
|
||||||
|
(
|
||||||
|
0xFFFF_FFFF_FFFF_FFFF as u64,
|
||||||
|
[0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF],
|
||||||
|
),
|
||||||
|
(
|
||||||
|
0x89AB_12D4_C2D2_09BB as u64,
|
||||||
|
[0x89, 0xAB, 0x12, 0xD4, 0xC2, 0xD2, 0x09, 0xBB],
|
||||||
|
),
|
||||||
|
];
|
||||||
|
|
||||||
|
let type_size = std::mem::size_of::<$data_type>();
|
||||||
|
for (test_val, v_arr) in &test_cases {
|
||||||
|
let v = *test_val as $data_type;
|
||||||
|
let cmp_iter: Box<dyn Iterator<Item = _>> = if $is_be {
|
||||||
|
Box::new(v_arr[(8 - type_size)..].iter())
|
||||||
|
} else {
|
||||||
|
Box::new(v_arr.iter().rev())
|
||||||
|
};
|
||||||
|
// test write
|
||||||
|
let mut write_arr = vec![Default::default(); type_size];
|
||||||
|
$write_fn_name(&mut write_arr, v);
|
||||||
|
for (cmp, cur) in cmp_iter.zip(write_arr.iter()) {
|
||||||
|
assert_eq!(*cmp, *cur as u8)
|
||||||
|
}
|
||||||
|
// test read
|
||||||
|
let read_val = $read_fn_name(&write_arr);
|
||||||
|
assert_eq!(v, read_val);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
|
byte_order_test_read_write!(test_le_u16, write_le_u16, read_le_u16, false, u16);
|
||||||
|
byte_order_test_read_write!(test_le_u32, write_le_u32, read_le_u32, false, u32);
|
||||||
|
byte_order_test_read_write!(test_le_u64, write_le_u64, read_le_u64, false, u64);
|
||||||
|
byte_order_test_read_write!(test_le_i32, write_le_i32, read_le_i32, false, i32);
|
||||||
|
byte_order_test_read_write!(test_be_u16, write_be_u16, read_be_u16, true, u16);
|
||||||
|
byte_order_test_read_write!(test_be_u32, write_be_u32, read_be_u32, true, u32);
|
||||||
|
}
|
Loading…
Reference in New Issue
Block a user