diff --git a/vmm/src/cpu.rs b/vmm/src/cpu.rs
index e2e9d49f8..7610951b2 100644
--- a/vmm/src/cpu.rs
+++ b/vmm/src/cpu.rs
@@ -114,8 +114,8 @@ pub enum Error {
     /// Cannot add legacy device to Bus.
     BusError(devices::BusError),
 
-    /// Failed to allocate MMIO range
-    AllocateMMIO,
+    /// Failed to allocate IO port
+    AllocateIOPort,
 
     /// Asking for more vCPUs that we can have
     DesiredVCPUCountExceedsMax,
@@ -373,8 +373,8 @@ impl Vcpu {
 pub struct CpuManager {
     boot_vcpus: u8,
     max_vcpus: u8,
-    io_bus: Arc<devices::Bus>,
-    mmio_bus: Weak<devices::Bus>,
+    io_bus: Weak<devices::Bus>,
+    mmio_bus: Arc<devices::Bus>,
     ioapic: Option<Arc<Mutex<ioapic::Ioapic>>>,
     vm_memory: Arc<ArcSwap<GuestMemoryMmap>>,
     cpuid: CpuId,
@@ -384,8 +384,6 @@ pub struct CpuManager {
     reset_evt: EventFd,
     vcpu_states: Vec<VcpuState>,
     selected_cpu: u8,
-    #[cfg(feature = "acpi")]
-    device_base: GuestAddress,
 }
 
 const CPU_ENABLE_FLAG: usize = 0;
@@ -494,8 +492,6 @@ impl VcpuState {
 }
 
 impl CpuManager {
-    pub const DEVICE_SIZE: u64 = 0xc;
-
     pub fn new(
         boot_vcpus: u8,
         max_vcpus: u8,
@@ -508,19 +504,11 @@ impl CpuManager {
         let mut vcpu_states = Vec::with_capacity(usize::from(max_vcpus));
         vcpu_states.resize_with(usize::from(max_vcpus), VcpuState::default);
 
-        #[cfg(feature = "acpi")]
-        let device_base = device_manager
-            .allocator()
-            .lock()
-            .unwrap()
-            .allocate_mmio_addresses(None, CpuManager::DEVICE_SIZE, None)
-            .ok_or(Error::AllocateMMIO)?;
-
         let cpu_manager = Arc::new(Mutex::new(CpuManager {
             boot_vcpus,
             max_vcpus,
-            io_bus: device_manager.io_bus().clone(),
-            mmio_bus: Arc::downgrade(&device_manager.mmio_bus().clone()),
+            io_bus: Arc::downgrade(&device_manager.io_bus().clone()),
+            mmio_bus: device_manager.mmio_bus().clone(),
             ioapic: device_manager.ioapic().clone(),
             vm_memory: guest_memory,
             cpuid,
@@ -530,18 +518,22 @@ impl CpuManager {
             vcpu_states,
             reset_evt,
             selected_cpu: 0,
-            #[cfg(feature = "acpi")]
-            device_base,
         }));
 
-        #[cfg(feature = "acpi")]
+        device_manager
+            .allocator()
+            .lock()
+            .unwrap()
+            .allocate_io_addresses(Some(GuestAddress(0x0cd8)), 0x8, None)
+            .ok_or(Error::AllocateIOPort)?;
+
         cpu_manager
             .lock()
             .unwrap()
-            .mmio_bus
+            .io_bus
             .upgrade()
             .unwrap()
-            .insert(cpu_manager.clone(), device_base.0, CpuManager::DEVICE_SIZE)
+            .insert(cpu_manager.clone(), 0x0cd8, 0xc)
             .map_err(Error::BusError)?;
 
         Ok(cpu_manager)
@@ -571,8 +563,8 @@ impl CpuManager {
             let mut vcpu = Vcpu::new(
                 cpu_id,
                 &self.fd,
-                self.io_bus.clone(),
-                self.mmio_bus.clone().upgrade().unwrap(),
+                self.io_bus.clone().upgrade().unwrap(),
+                self.mmio_bus.clone(),
                 ioapic,
                 creation_ts,
             )?;
@@ -860,7 +852,7 @@ impl Aml for CPUMethods {
                 vec![
                     // Take lock defined above
                     &aml::Acquire::new("\\_SB_.PRES.CPLK".into(), 0xfff),
-                    // Write CPU number (in first argument) to MMIO region via field
+                    // Write CPU number (in first argument) to I/O port via field
                     &aml::Store::new(&aml::Path::new("\\_SB_.PRES.CSEL"), &aml::Arg(0)),
                     &aml::Store::new(&aml::Local(0), &aml::ZERO),
                     // Check if CPEN bit is set, if so make the local variable 0xf (see _STA for details of meaning)
@@ -898,7 +890,7 @@ impl Aml for CPUMethods {
                 true,
                 vec![
                     &aml::Acquire::new("\\_SB_.PRES.CPLK".into(), 0xfff),
-                    // Write CPU number (in first argument) to MMIO region via field
+                    // Write CPU number (in first argument) to I/O port via field
                     &aml::Store::new(&aml::Path::new("\\_SB_.PRES.CSEL"), &aml::Arg(0)),
                     // Set CEJ0 bit
                     &aml::Store::new(&aml::Path::new("\\_SB_.PRES.CEJ0"), &aml::ONE),
@@ -920,7 +912,7 @@ impl Aml for CPUMethods {
                     &aml::While::new(
                         &aml::LessThan::new(&aml::Local(0), &self.max_vcpus),
                         vec![
-                            // Write CPU number (in first argument) to MMIO region via field
+                            // Write CPU number (in first argument) to I/O port via field
                             &aml::Store::new(&aml::Path::new("\\_SB_.PRES.CSEL"), &aml::Local(0)),
                             // Check if CINS bit is set
                             &aml::If::new(
@@ -979,23 +971,15 @@ impl Aml for CpuManager {
                     &aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0A06")),
                     // Mutex to protect concurrent access as we write to choose CPU and then read back status
                     &aml::Mutex::new("CPLK".into(), 0),
-                    // MMIO region for CPU controller
+                    // I/O port for CPU controller
                     &aml::Name::new(
                         "_CRS".into(),
-                        &aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
-                            aml::AddressSpaceCachable::NotCacheable,
-                            true,
-                            self.device_base.0,
-                            self.device_base.0 + CpuManager::DEVICE_SIZE - 1,
+                        &aml::ResourceTemplate::new(vec![&aml::IO::new(
+                            0x0cd8, 0x0cd8, 0x01, 0x0c,
                         )]),
                     ),
-                    // OpRegion and Fields map MMIO region into individual field values
-                    &aml::OpRegion::new(
-                        "PRST".into(),
-                        aml::OpRegionSpace::SystemMemory,
-                        self.device_base.0 as usize,
-                        CpuManager::DEVICE_SIZE as usize,
-                    ),
+                    // OpRegion and Fields map I/O port into individual field values
+                    &aml::OpRegion::new("PRST".into(), aml::OpRegionSpace::SystemIO, 0x0cd8, 0x0c),
                     &aml::Field::new(
                         "PRST".into(),
                         aml::FieldAccessType::Byte,