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aarch64: Align the data types in layout

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Some addresses defined in `layout.rs` were of type `GuestAddress`, and
are `u64`. Now align the types of all the `*_START` definitions to
`GuestAddress`.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>
This commit is contained in:
Michael Zhao 2022-04-05 17:05:24 +08:00 committed by Bo Chen
parent d10bfd5aa4
commit 656425a328
7 changed files with 31 additions and 29 deletions
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6
arch/src/aarch64/fdt.rs
View File

@ -580,11 +580,11 @@ fn create_pci_nodes(
// Here we cut off PCI device space below 8G in FDT to workaround the EDK2 check. // Here we cut off PCI device space below 8G in FDT to workaround the EDK2 check.
// But the address written in ACPI is not impacted. // But the address written in ACPI is not impacted.
let (pci_device_base_64bit, pci_device_size_64bit) = let (pci_device_base_64bit, pci_device_size_64bit) =
if pci_device_info_elem.pci_device_space_start < PCI_HIGH_BASE { if pci_device_info_elem.pci_device_space_start < PCI_HIGH_BASE.raw_value() {
( (
PCI_HIGH_BASE, PCI_HIGH_BASE.raw_value(),
pci_device_info_elem.pci_device_space_size pci_device_info_elem.pci_device_space_size
- (PCI_HIGH_BASE - pci_device_info_elem.pci_device_space_start), - (PCI_HIGH_BASE.raw_value() - pci_device_info_elem.pci_device_space_start),
) )
} else { } else {
( (

3
arch/src/aarch64/gic/gicv3.rs
View File

@ -22,6 +22,7 @@ pub mod kvm {
use std::{boxed::Box, result}; use std::{boxed::Box, result};
use versionize::{VersionMap, Versionize, VersionizeResult}; use versionize::{VersionMap, Versionize, VersionizeResult};
use versionize_derive::Versionize; use versionize_derive::Versionize;
use vm_memory::Address;
use vm_migration::{ use vm_migration::{
Migratable, MigratableError, Pausable, Snapshot, Snapshottable, Transportable, Migratable, MigratableError, Pausable, Snapshot, Snapshottable, Transportable,
VersionMapped, VersionMapped,
@ -83,7 +84,7 @@ pub mod kvm {
/// Get the address of the GIC distributor. /// Get the address of the GIC distributor.
pub fn get_dist_addr() -> u64 { pub fn get_dist_addr() -> u64 {
layout::GIC_V3_DIST_START layout::GIC_V3_DIST_START.raw_value()
} }
/// Get the size of the GIC distributor. /// Get the size of the GIC distributor.

27
arch/src/aarch64/layout.rs
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@ -55,17 +55,16 @@ use vm_memory::GuestAddress;
/// 0x0 ~ 0x40_0000 (4 MiB) is reserved to UEFI /// 0x0 ~ 0x40_0000 (4 MiB) is reserved to UEFI
/// UEFI binary size is required less than 3 MiB, reserving 4 MiB is enough. /// UEFI binary size is required less than 3 MiB, reserving 4 MiB is enough.
pub const UEFI_START: u64 = 0x0; pub const UEFI_START: GuestAddress = GuestAddress(0);
pub const MEM_UEFI_START: GuestAddress = GuestAddress(0);
pub const UEFI_SIZE: u64 = 0x040_0000; pub const UEFI_SIZE: u64 = 0x040_0000;
/// Below this address will reside the GIC, above this address will reside the MMIO devices. /// Below this address will reside the GIC, above this address will reside the MMIO devices.
pub const MAPPED_IO_START: u64 = 0x0900_0000; pub const MAPPED_IO_START: GuestAddress = GuestAddress(0x0900_0000);
/// See kernel file arch/arm64/include/uapi/asm/kvm.h for the GIC related definitions. /// See kernel file arch/arm64/include/uapi/asm/kvm.h for the GIC related definitions.
/// 0x08ff_0000 ~ 0x0900_0000 is reserved for GICv3 Distributor /// 0x08ff_0000 ~ 0x0900_0000 is reserved for GICv3 Distributor
pub const GIC_V3_DIST_SIZE: u64 = 0x01_0000; pub const GIC_V3_DIST_SIZE: u64 = 0x01_0000;
pub const GIC_V3_DIST_START: u64 = MAPPED_IO_START - GIC_V3_DIST_SIZE; pub const GIC_V3_DIST_START: GuestAddress = GuestAddress(MAPPED_IO_START.0 - GIC_V3_DIST_SIZE);
/// Below 0x08ff_0000 is reserved for GICv3 Redistributor. /// Below 0x08ff_0000 is reserved for GICv3 Redistributor.
/// The size defined here is for each vcpu. /// The size defined here is for each vcpu.
/// The total size is 'number_of_vcpu * GIC_V3_REDIST_SIZE' /// The total size is 'number_of_vcpu * GIC_V3_REDIST_SIZE'
@ -74,9 +73,9 @@ pub const GIC_V3_REDIST_SIZE: u64 = 0x02_0000;
pub const GIC_V3_ITS_SIZE: u64 = 0x02_0000; pub const GIC_V3_ITS_SIZE: u64 = 0x02_0000;
/// Space 0x0900_0000 ~ 0x0905_0000 is reserved for legacy devices. /// Space 0x0900_0000 ~ 0x0905_0000 is reserved for legacy devices.
pub const LEGACY_SERIAL_MAPPED_IO_START: u64 = 0x0900_0000; pub const LEGACY_SERIAL_MAPPED_IO_START: GuestAddress = GuestAddress(0x0900_0000);
pub const LEGACY_RTC_MAPPED_IO_START: u64 = 0x0901_0000; pub const LEGACY_RTC_MAPPED_IO_START: GuestAddress = GuestAddress(0x0901_0000);
pub const LEGACY_GPIO_MAPPED_IO_START: u64 = 0x0902_0000; pub const LEGACY_GPIO_MAPPED_IO_START: GuestAddress = GuestAddress(0x0902_0000);
/// Space 0x0905_0000 ~ 0x0906_0000 is reserved for pcie io address /// Space 0x0905_0000 ~ 0x0906_0000 is reserved for pcie io address
pub const MEM_PCI_IO_START: GuestAddress = GuestAddress(0x0905_0000); pub const MEM_PCI_IO_START: GuestAddress = GuestAddress(0x0905_0000);
@ -108,19 +107,19 @@ pub const CMDLINE_MAX_SIZE: usize = 2048;
/// FDT is at the beginning of RAM. /// FDT is at the beginning of RAM.
/// Maximum size of the device tree blob as specified in https://www.kernel.org/doc/Documentation/arm64/booting.txt. /// Maximum size of the device tree blob as specified in https://www.kernel.org/doc/Documentation/arm64/booting.txt.
pub const FDT_START: u64 = RAM_START.0; pub const FDT_START: GuestAddress = RAM_START;
pub const FDT_MAX_SIZE: usize = 0x20_0000; pub const FDT_MAX_SIZE: u64 = 0x20_0000;
/// Put ACPI table above dtb /// Put ACPI table above dtb
pub const ACPI_START: u64 = RAM_START.0 + FDT_MAX_SIZE as u64; pub const ACPI_START: GuestAddress = GuestAddress(RAM_START.0 + FDT_MAX_SIZE);
pub const ACPI_MAX_SIZE: usize = 0x20_0000; pub const ACPI_MAX_SIZE: u64 = 0x20_0000;
pub const RSDP_POINTER: GuestAddress = GuestAddress(ACPI_START); pub const RSDP_POINTER: GuestAddress = ACPI_START;
/// Kernel start after FDT and ACPI /// Kernel start after FDT and ACPI
pub const KERNEL_START: u64 = ACPI_START + ACPI_MAX_SIZE as u64; pub const KERNEL_START: GuestAddress = GuestAddress(ACPI_START.0 + ACPI_MAX_SIZE);
/// Pci high memory base /// Pci high memory base
pub const PCI_HIGH_BASE: u64 = 0x2_0000_0000_u64; pub const PCI_HIGH_BASE: GuestAddress = GuestAddress(0x2_0000_0000);
// As per virt/kvm/arm/vgic/vgic-kvm-device.c we need // As per virt/kvm/arm/vgic/vgic-kvm-device.c we need
// the number of interrupts our GIC will support to be: // the number of interrupts our GIC will support to be:

6
arch/src/aarch64/mod.rs
View File

@ -202,17 +202,17 @@ pub fn initramfs_load_addr(
/// Returns the memory address where the kernel could be loaded. /// Returns the memory address where the kernel could be loaded.
pub fn get_kernel_start() -> u64 { pub fn get_kernel_start() -> u64 {
layout::KERNEL_START layout::KERNEL_START.raw_value()
} }
///Return guest memory address where the uefi should be loaded. ///Return guest memory address where the uefi should be loaded.
pub fn get_uefi_start() -> u64 { pub fn get_uefi_start() -> u64 {
layout::UEFI_START layout::UEFI_START.raw_value()
} }
// Auxiliary function to get the address where the device tree blob is loaded. // Auxiliary function to get the address where the device tree blob is loaded.
fn get_fdt_addr() -> u64 { fn get_fdt_addr() -> u64 {
layout::FDT_START layout::FDT_START.raw_value()
} }
pub fn get_host_cpu_phys_bits() -> u8 { pub fn get_host_cpu_phys_bits() -> u8 {

2
vmm/src/acpi.rs
View File

@ -667,7 +667,7 @@ pub fn create_acpi_tables(
.clone() .clone()
.get(&(DeviceType::Serial, DeviceType::Serial.to_string())) .get(&(DeviceType::Serial, DeviceType::Serial.to_string()))
.is_some(); .is_some();
let serial_device_addr = arch::layout::LEGACY_SERIAL_MAPPED_IO_START; let serial_device_addr = arch::layout::LEGACY_SERIAL_MAPPED_IO_START.raw_value();
let serial_device_irq = if is_serial_on { let serial_device_irq = if is_serial_on {
device_manager device_manager
.lock() .lock()

6
vmm/src/cpu.rs
View File

@ -1276,6 +1276,7 @@ impl CpuManager {
#[cfg(target_arch = "aarch64")] #[cfg(target_arch = "aarch64")]
{ {
use vm_memory::Address;
/* Notes: /* Notes:
* Ignore Local Interrupt Controller Address at byte offset 36 of MADT table. * Ignore Local Interrupt Controller Address at byte offset 36 of MADT table.
*/ */
@ -1323,7 +1324,7 @@ impl CpuManager {
length: 24, length: 24,
reserved0: 0, reserved0: 0,
gic_id: 0, gic_id: 0,
base_address: arch::layout::MAPPED_IO_START - 0x0001_0000, base_address: arch::layout::MAPPED_IO_START.raw_value() - 0x0001_0000,
global_irq_base: 0, global_irq_base: 0,
version: 3, version: 3,
reserved1: [0; 3], reserved1: [0; 3],
@ -1332,7 +1333,8 @@ impl CpuManager {
// See 5.2.12.17 GIC Redistributor (GICR) Structure in ACPI spec. // See 5.2.12.17 GIC Redistributor (GICR) Structure in ACPI spec.
let gicr_size: u32 = 0x0001_0000 * 2 * (self.config.boot_vcpus as u32); let gicr_size: u32 = 0x0001_0000 * 2 * (self.config.boot_vcpus as u32);
let gicr_base: u64 = arch::layout::MAPPED_IO_START - 0x0001_0000 - gicr_size as u64; let gicr_base: u64 =
arch::layout::MAPPED_IO_START.raw_value() - 0x0001_0000 - gicr_size as u64;
let gicr = GicR { let gicr = GicR {
r#type: acpi::ACPI_APIC_GENERIC_REDISTRIBUTOR, r#type: acpi::ACPI_APIC_GENERIC_REDISTRIBUTOR,
length: 16, length: 16,

10
vmm/src/device_manager.rs
View File

@ -1190,7 +1190,7 @@ impl DeviceManager {
#[cfg(target_arch = "aarch64")] #[cfg(target_arch = "aarch64")]
{ {
let vcpus = self.config.lock().unwrap().cpus.boot_vcpus; let vcpus = self.config.lock().unwrap().cpus.boot_vcpus;
let msi_start = arch::layout::GIC_V3_DIST_START let msi_start = arch::layout::GIC_V3_DIST_START.raw_value()
- arch::layout::GIC_V3_REDIST_SIZE * (vcpus as u64) - arch::layout::GIC_V3_REDIST_SIZE * (vcpus as u64)
- arch::layout::GIC_V3_ITS_SIZE; - arch::layout::GIC_V3_ITS_SIZE;
let msi_end = msi_start + arch::layout::GIC_V3_ITS_SIZE - 1; let msi_end = msi_start + arch::layout::GIC_V3_ITS_SIZE - 1;
@ -1539,7 +1539,7 @@ impl DeviceManager {
self.bus_devices self.bus_devices
.push(Arc::clone(&rtc_device) as Arc<Mutex<dyn BusDevice>>); .push(Arc::clone(&rtc_device) as Arc<Mutex<dyn BusDevice>>);
let addr = GuestAddress(arch::layout::LEGACY_RTC_MAPPED_IO_START); let addr = arch::layout::LEGACY_RTC_MAPPED_IO_START;
self.address_manager self.address_manager
.mmio_bus .mmio_bus
@ -1579,7 +1579,7 @@ impl DeviceManager {
self.bus_devices self.bus_devices
.push(Arc::clone(&gpio_device) as Arc<Mutex<dyn BusDevice>>); .push(Arc::clone(&gpio_device) as Arc<Mutex<dyn BusDevice>>);
let addr = GuestAddress(arch::layout::LEGACY_GPIO_MAPPED_IO_START); let addr = arch::layout::LEGACY_GPIO_MAPPED_IO_START;
self.address_manager self.address_manager
.mmio_bus .mmio_bus
@ -1685,7 +1685,7 @@ impl DeviceManager {
self.bus_devices self.bus_devices
.push(Arc::clone(&serial) as Arc<Mutex<dyn BusDevice>>); .push(Arc::clone(&serial) as Arc<Mutex<dyn BusDevice>>);
let addr = GuestAddress(arch::layout::LEGACY_SERIAL_MAPPED_IO_START); let addr = arch::layout::LEGACY_SERIAL_MAPPED_IO_START;
self.address_manager self.address_manager
.mmio_bus .mmio_bus
@ -4293,7 +4293,7 @@ impl Aml for DeviceManager {
#[cfg(target_arch = "aarch64")] #[cfg(target_arch = "aarch64")]
&aml::Memory32Fixed::new( &aml::Memory32Fixed::new(
true, true,
arch::layout::LEGACY_SERIAL_MAPPED_IO_START as u32, arch::layout::LEGACY_SERIAL_MAPPED_IO_START.raw_value() as u32,
MMIO_LEN as u32, MMIO_LEN as u32,
), ),
]), ]),