mirror of
https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2024-11-04 19:11:11 +00:00
hypervisor: provide a generic FpuState structure
Signed-off-by: Wei Liu <liuwe@microsoft.com>
This commit is contained in:
parent
08135fa085
commit
6a8c0fc887
@ -10,8 +10,7 @@ use crate::layout::{BOOT_GDT_START, BOOT_IDT_START, PVH_INFO_START};
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use crate::GuestMemoryMmap;
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use hypervisor::arch::x86::gdt::{gdt_entry, segment_from_gdt};
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use hypervisor::arch::x86::regs::CR0_PE;
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use hypervisor::arch::x86::{SpecialRegisters, StandardRegisters};
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use hypervisor::x86_64::FpuState;
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use hypervisor::arch::x86::{FpuState, SpecialRegisters, StandardRegisters};
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use std::sync::Arc;
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use std::{mem, result};
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use vm_memory::{Address, Bytes, GuestMemory, GuestMemoryError};
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@ -241,3 +241,16 @@ pub struct CpuIdEntry {
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}
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pub const CPUID_FLAG_VALID_INDEX: u32 = 1;
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#[derive(Default, Debug, Clone, serde::Deserialize, serde::Serialize)]
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pub struct FpuState {
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pub fpr: [[u8; 16usize]; 8usize],
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pub fcw: u16,
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pub fsw: u16,
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pub ftwx: u8,
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pub last_opcode: u16,
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pub last_ip: u64,
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pub last_dp: u64,
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pub xmm: [[u8; 16usize]; 16usize],
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pub mxcsr: u32,
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}
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@ -13,7 +13,7 @@ use crate::aarch64::VcpuInit;
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#[cfg(target_arch = "aarch64")]
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use crate::aarch64::{RegList, Register, StandardRegisters};
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#[cfg(target_arch = "x86_64")]
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use crate::arch::x86::{CpuIdEntry, SpecialRegisters, StandardRegisters};
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use crate::arch::x86::{CpuIdEntry, FpuState, SpecialRegisters, StandardRegisters};
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#[cfg(feature = "tdx")]
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use crate::kvm::{TdxExitDetails, TdxExitStatus};
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#[cfg(target_arch = "x86_64")]
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@ -21,7 +21,7 @@ use crate::x86_64::LapicState;
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#[cfg(target_arch = "x86_64")]
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use crate::x86_64::Xsave;
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#[cfg(target_arch = "x86_64")]
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use crate::x86_64::{ExtendedControlRegisters, FpuState, MsrEntries, VcpuEvents};
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use crate::x86_64::{ExtendedControlRegisters, MsrEntries, VcpuEvents};
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use crate::CpuState;
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#[cfg(target_arch = "aarch64")]
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use crate::DeviceAttr;
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@ -46,7 +46,9 @@ use vmm_sys_util::eventfd::EventFd;
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#[cfg(target_arch = "x86_64")]
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pub mod x86_64;
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#[cfg(target_arch = "x86_64")]
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use crate::arch::x86::{CpuIdEntry, SpecialRegisters, StandardRegisters, NUM_IOAPIC_PINS};
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use crate::arch::x86::{
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CpuIdEntry, FpuState, SpecialRegisters, StandardRegisters, NUM_IOAPIC_PINS,
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};
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#[cfg(target_arch = "x86_64")]
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use crate::ClockData;
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use crate::{
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@ -61,7 +63,7 @@ use kvm_bindings::{
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KVM_CAP_SPLIT_IRQCHIP, KVM_GUESTDBG_ENABLE, KVM_GUESTDBG_SINGLESTEP, KVM_GUESTDBG_USE_HW_BP,
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};
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#[cfg(target_arch = "x86_64")]
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use x86_64::{check_required_kvm_extensions, FpuState};
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use x86_64::check_required_kvm_extensions;
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#[cfg(target_arch = "x86_64")]
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pub use x86_64::{CpuId, ExtendedControlRegisters, LapicState, MsrEntries, VcpuKvmState, Xsave};
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// aarch64 dependencies
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@ -1306,17 +1308,20 @@ impl cpu::Vcpu for KvmVcpu {
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/// Returns the floating point state (FPU) from the vCPU.
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///
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fn get_fpu(&self) -> cpu::Result<FpuState> {
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self.fd
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Ok(self
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.fd
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.get_fpu()
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.map_err(|e| cpu::HypervisorCpuError::GetFloatingPointRegs(e.into()))
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.map_err(|e| cpu::HypervisorCpuError::GetFloatingPointRegs(e.into()))?
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.into())
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}
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#[cfg(target_arch = "x86_64")]
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///
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/// Set the floating point state (FPU) of a vCPU using the `KVM_SET_FPU` ioct.
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///
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fn set_fpu(&self, fpu: &FpuState) -> cpu::Result<()> {
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let fpu: kvm_bindings::kvm_fpu = (*fpu).clone().into();
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self.fd
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.set_fpu(fpu)
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.set_fpu(&fpu)
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.map_err(|e| cpu::HypervisorCpuError::SetFloatingPointRegs(e.into()))
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}
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#[cfg(target_arch = "x86_64")]
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@ -9,7 +9,7 @@
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//
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use crate::arch::x86::{
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CpuIdEntry, DescriptorTable, SegmentRegister, SpecialRegisters, StandardRegisters,
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CpuIdEntry, DescriptorTable, FpuState, SegmentRegister, SpecialRegisters, StandardRegisters,
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CPUID_FLAG_VALID_INDEX,
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};
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use crate::kvm::{Cap, Kvm, KvmError, KvmResult};
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@ -19,7 +19,7 @@ use serde::{Deserialize, Serialize};
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/// Export generically-named wrappers of kvm-bindings for Unix-based platforms
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///
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pub use {
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kvm_bindings::kvm_cpuid_entry2, kvm_bindings::kvm_dtable, kvm_bindings::kvm_fpu as FpuState,
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kvm_bindings::kvm_cpuid_entry2, kvm_bindings::kvm_dtable, kvm_bindings::kvm_fpu,
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kvm_bindings::kvm_lapic_state as LapicState, kvm_bindings::kvm_mp_state as MpState,
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kvm_bindings::kvm_msr_entry as MsrEntry, kvm_bindings::kvm_regs, kvm_bindings::kvm_segment,
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kvm_bindings::kvm_sregs, kvm_bindings::kvm_vcpu_events as VcpuEvents,
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@ -262,3 +262,36 @@ impl From<kvm_cpuid_entry2> for CpuIdEntry {
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}
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}
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}
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impl From<kvm_fpu> for FpuState {
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fn from(s: kvm_fpu) -> Self {
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Self {
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fpr: s.fpr,
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fcw: s.fcw,
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fsw: s.fsw,
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ftwx: s.ftwx,
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last_opcode: s.last_opcode,
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last_ip: s.last_ip,
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last_dp: s.last_dp,
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xmm: s.xmm,
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mxcsr: s.mxcsr,
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}
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}
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}
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impl From<FpuState> for kvm_fpu {
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fn from(s: FpuState) -> Self {
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Self {
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fpr: s.fpr,
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fcw: s.fcw,
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fsw: s.fsw,
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ftwx: s.ftwx,
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last_opcode: s.last_opcode,
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last_ip: s.last_ip,
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last_dp: s.last_dp,
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xmm: s.xmm,
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mxcsr: s.mxcsr,
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..Default::default()
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}
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}
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}
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@ -37,7 +37,7 @@ use std::fs::File;
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use std::os::unix::io::AsRawFd;
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#[cfg(target_arch = "x86_64")]
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use crate::arch::x86::{CpuIdEntry, SpecialRegisters, StandardRegisters};
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use crate::arch::x86::{CpuIdEntry, FpuState, SpecialRegisters, StandardRegisters};
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const DIRTY_BITMAP_CLEAR_DIRTY: u64 = 0x4;
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const DIRTY_BITMAP_SET_DIRTY: u64 = 0x8;
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@ -317,17 +317,20 @@ impl cpu::Vcpu for MshvVcpu {
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/// Returns the floating point state (FPU) from the vCPU.
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///
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fn get_fpu(&self) -> cpu::Result<FpuState> {
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self.fd
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Ok(self
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.fd
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.get_fpu()
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.map_err(|e| cpu::HypervisorCpuError::GetFloatingPointRegs(e.into()))
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.map_err(|e| cpu::HypervisorCpuError::GetFloatingPointRegs(e.into()))?
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.into())
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}
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#[cfg(target_arch = "x86_64")]
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///
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/// Set the floating point state (FPU) of a vCPU.
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///
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fn set_fpu(&self, fpu: &FpuState) -> cpu::Result<()> {
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let fpu: mshv_bindings::FloatingPointUnit = (*fpu).clone().into();
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self.fd
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.set_fpu(fpu)
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.set_fpu(&fpu)
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.map_err(|e| cpu::HypervisorCpuError::SetFloatingPointRegs(e.into()))
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}
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@ -8,7 +8,7 @@
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//
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//
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use crate::arch::x86::{
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CpuIdEntry, DescriptorTable, SegmentRegister, SpecialRegisters, StandardRegisters,
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CpuIdEntry, DescriptorTable, FpuState, SegmentRegister, SpecialRegisters, StandardRegisters,
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};
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use serde::{Deserialize, Serialize};
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use std::fmt;
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@ -19,7 +19,7 @@ use std::fmt;
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pub use {
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mshv_bindings::hv_cpuid_entry, mshv_bindings::mshv_user_mem_region as MemoryRegion,
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mshv_bindings::msr_entry as MsrEntry, mshv_bindings::CpuId, mshv_bindings::DebugRegisters,
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mshv_bindings::FloatingPointUnit as FpuState, mshv_bindings::LapicState,
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mshv_bindings::FloatingPointUnit, mshv_bindings::LapicState,
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mshv_bindings::MiscRegs as MiscRegisters, mshv_bindings::MsrList,
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mshv_bindings::Msrs as MsrEntries, mshv_bindings::Msrs,
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mshv_bindings::SegmentRegister as MshvSegmentRegister,
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@ -252,3 +252,36 @@ impl From<hv_cpuid_entry> for CpuIdEntry {
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}
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}
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}
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impl From<FloatingPointUnit> for FpuState {
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fn from(s: FloatingPointUnit) -> Self {
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Self {
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fpr: s.fpr,
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fcw: s.fcw,
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fsw: s.fsw,
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ftwx: s.ftwx,
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last_opcode: s.last_opcode,
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last_ip: s.last_ip,
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last_dp: s.last_dp,
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xmm: s.xmm,
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mxcsr: s.mxcsr,
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}
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}
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}
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impl From<FpuState> for FloatingPointUnit {
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fn from(s: FpuState) -> Self {
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Self {
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fpr: s.fpr,
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fcw: s.fcw,
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fsw: s.fsw,
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ftwx: s.ftwx,
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last_opcode: s.last_opcode,
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last_ip: s.last_ip,
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last_dp: s.last_dp,
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xmm: s.xmm,
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mxcsr: s.mxcsr,
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..Default::default()
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}
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}
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}
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@ -2336,8 +2336,8 @@ impl CpuElf64Writable for CpuManager {
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mod tests {
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use arch::x86_64::interrupts::*;
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use arch::x86_64::regs::*;
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use hypervisor::arch::x86::StandardRegisters;
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use hypervisor::x86_64::{FpuState, LapicState};
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use hypervisor::arch::x86::{FpuState, StandardRegisters};
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use hypervisor::x86_64::LapicState;
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#[test]
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fn test_setlint() {
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