diff --git a/pci/src/configuration.rs b/pci/src/configuration.rs
index b0f8d2b4b..7c86654c0 100644
--- a/pci/src/configuration.rs
+++ b/pci/src/configuration.rs
@@ -481,7 +481,7 @@ impl PciConfiguration {
     pub fn write_reg(&mut self, reg_idx: usize, value: u32) {
         let mut mask = self.writable_bits[reg_idx];
 
-        if reg_idx >= BAR0_REG && reg_idx < BAR0_REG + NUM_BAR_REGS {
+        if (BAR0_REG..BAR0_REG + NUM_BAR_REGS).contains(&reg_idx) {
             // Handle very specific case where the BAR is being written with
             // all 1's to retrieve the BAR size during next BAR reading.
             if value == 0xffff_ffff {
@@ -768,7 +768,7 @@ impl PciConfiguration {
         let value = LittleEndian::read_u32(data);
 
         let mask = self.writable_bits[reg_idx];
-        if reg_idx >= BAR0_REG && reg_idx < BAR0_REG + NUM_BAR_REGS {
+        if (BAR0_REG..BAR0_REG + NUM_BAR_REGS).contains(&reg_idx) {
             let bar_idx = reg_idx - 4;
             if (value & mask) != (self.bars[bar_idx].addr & mask) {
                 // Handle special case where the address being written is
diff --git a/pci/src/vfio.rs b/pci/src/vfio.rs
index cbe8609e8..2ef93e83c 100644
--- a/pci/src/vfio.rs
+++ b/pci/src/vfio.rs
@@ -892,7 +892,7 @@ impl PciDevice for VfioPciDevice {
         // When the guest wants to write to a BAR, we trap it into
         // our local configuration space. We're not reprogramming
         // VFIO device.
-        if (reg_idx >= PCI_CONFIG_BAR0_INDEX && reg_idx < PCI_CONFIG_BAR0_INDEX + BAR_NUMS)
+        if (PCI_CONFIG_BAR0_INDEX..PCI_CONFIG_BAR0_INDEX + BAR_NUMS).contains(&reg_idx)
             || reg_idx == PCI_ROM_EXP_BAR_INDEX
         {
             // We keep our local cache updated with the BARs.
@@ -945,7 +945,7 @@ impl PciDevice for VfioPciDevice {
         // from our local configuration space. We want the guest to
         // use that and not the VFIO device BARs as it does not map
         // with the guest address space.
-        if (reg_idx >= PCI_CONFIG_BAR0_INDEX && reg_idx < PCI_CONFIG_BAR0_INDEX + BAR_NUMS)
+        if (PCI_CONFIG_BAR0_INDEX..PCI_CONFIG_BAR0_INDEX + BAR_NUMS).contains(&reg_idx)
             || reg_idx == PCI_ROM_EXP_BAR_INDEX
         {
             return self.configuration.read_reg(reg_idx);