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hypervisor: x86: move RFLAGS bits to regs.rs
Signed-off-by: Wei Liu <liuwe@microsoft.com>
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@ -14,23 +14,10 @@ extern crate iced_x86;
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use crate::arch::emulator::{EmulationError, PlatformEmulator};
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use crate::arch::x86::emulator::instructions::*;
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use crate::arch::x86::regs::*;
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use crate::arch::x86::Exception;
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// CMP affects OF, SF, ZF, AF, PF and CF
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const CF_SHIFT: usize = 0;
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const PF_SHIFT: usize = 2;
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const AF_SHIFT: usize = 4;
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const ZF_SHIFT: usize = 6;
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const SF_SHIFT: usize = 7;
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const OF_SHIFT: usize = 11;
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const CF: u64 = 1 << CF_SHIFT;
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const PF: u64 = 1 << PF_SHIFT;
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const AF: u64 = 1 << AF_SHIFT;
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const ZF: u64 = 1 << ZF_SHIFT;
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const SF: u64 = 1 << SF_SHIFT;
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const OF: u64 = 1 << OF_SHIFT;
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const FLAGS_MASK: u64 = CF | PF | AF | ZF | SF | OF;
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// TODO: Switch to inline asm when that's stable. Executing CMP (or any arthimetic instructions)
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@ -15,3 +15,18 @@ pub const CR0_PG: u64 = 0x80000000;
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// CR4 bits
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pub const CR4_PAE: u64 = 0x20;
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pub const CR4_LA57: u64 = 0x1000;
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// RFlags bits
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pub const CF_SHIFT: usize = 0;
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pub const PF_SHIFT: usize = 2;
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pub const AF_SHIFT: usize = 4;
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pub const ZF_SHIFT: usize = 6;
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pub const SF_SHIFT: usize = 7;
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pub const OF_SHIFT: usize = 11;
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pub const CF: u64 = 1 << CF_SHIFT;
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pub const PF: u64 = 1 << PF_SHIFT;
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pub const AF: u64 = 1 << AF_SHIFT;
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pub const ZF: u64 = 1 << ZF_SHIFT;
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pub const SF: u64 = 1 << SF_SHIFT;
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pub const OF: u64 = 1 << OF_SHIFT;
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