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vmm, devices: Update to latest acpi_tables crate API

Browse Source 
Significant API changes have occured, most significantly is the switch
to an approach which does not require vm-memory and can run no_std.

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
This commit is contained in:
Rob Bradford 2023-03-02 08:01:33 +00:00 committed by Rob Bradford
parent 02f774824b
commit 73c4156775
9 changed files with 166 additions and 111 deletions
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5
Cargo.lock generated
View File

@ -5,9 +5,9 @@ version = 3
[[package]]
name = "acpi_tables"
version = "0.1.0"
source = "git+https://github.com/rust-vmm/acpi_tables?branch=main#12bb6d7b252831527e630f8b3ef48877dbb11924"
source = "git+https://github.com/rust-vmm/acpi_tables?branch=main#0b892e2c2053c4ecfac8d9e5a52babae75114702"
dependencies = [
"vm-memory",
"zerocopy",
]
[[package]]
@ -1640,6 +1640,7 @@ dependencies = [
"vm-migration",
"vm-virtio",
"vmm-sys-util",
"zerocopy",
]
[[package]]

15
devices/src/acpi.rs
View File

@ -4,7 +4,7 @@
//
use super::AcpiNotificationFlags;
use acpi_tables::{aml, aml::Aml};
use acpi_tables::{aml, Aml, AmlSink};
use std::sync::{Arc, Barrier};
use std::time::Instant;
use vm_device::interrupt::InterruptSourceGroup;
@ -103,11 +103,11 @@ impl BusDevice for AcpiGedDevice {
}
impl Aml for AcpiGedDevice {
fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
aml::Device::new(
"_SB_.GEC_".into(),
vec![
&aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0A06")),
&aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0A06")),
&aml::Name::new("_UID".into(), &"Generic Event Controller"),
&aml::Name::new(
"_CRS".into(),
@ -121,12 +121,13 @@ impl Aml for AcpiGedDevice {
&aml::OpRegion::new(
"GDST".into(),
aml::OpRegionSpace::SystemMemory,
self.address.0 as usize,
GED_DEVICE_ACPI_SIZE,
&(self.address.0 as usize),
&GED_DEVICE_ACPI_SIZE,
),
&aml::Field::new(
"GDST".into(),
aml::FieldAccessType::Byte,
aml::FieldLockRule::NoLock,
aml::FieldUpdateRule::WriteAsZeroes,
vec![aml::FieldEntry::Named(*b"GDAT", 8)],
),
@ -163,7 +164,7 @@ impl Aml for AcpiGedDevice {
),
],
)
.append_aml_bytes(bytes);
.to_aml_bytes(sink);
aml::Device::new(
"_SB_.GED_".into(),
vec![
@ -187,7 +188,7 @@ impl Aml for AcpiGedDevice {
),
],
)
.append_aml_bytes(bytes)
.to_aml_bytes(sink)
}
}

26
fuzz/Cargo.lock generated
View File

@ -5,9 +5,9 @@ version = 3
[[package]]
name = "acpi_tables"
version = "0.1.0"
source = "git+https://github.com/rust-vmm/acpi_tables?branch=main#4fd38dd5f746730ec5ae848dafcf8c2f50a13fc3"
source = "git+https://github.com/rust-vmm/acpi_tables?branch=main#0b892e2c2053c4ecfac8d9e5a52babae75114702"
dependencies = [
"vm-memory",
"zerocopy",
]
[[package]]
@ -989,6 +989,7 @@ dependencies = [
"vm-migration",
"vm-virtio",
"vmm-sys-util",
"zerocopy",
]
[[package]]
@ -1030,3 +1031,24 @@ name = "winapi-x86_64-pc-windows-gnu"
version = "0.4.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "712e227841d057c1ee1cd2fb22fa7e5a5461ae8e48fa2ca79ec42cfc1931183f"
[[package]]
name = "zerocopy"
version = "0.6.1"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "332f188cc1bcf1fe1064b8c58d150f497e697f49774aa846f2dc949d9a25f236"
dependencies = [
"byteorder",
"zerocopy-derive",
]
[[package]]
name = "zerocopy-derive"
version = "0.3.2"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "6505e6815af7de1746a08f69c69606bb45695a17149517680f3b2149713b19a3"
dependencies = [
"proc-macro2",
"quote",
"syn",
]

1
vmm/Cargo.toml
View File

@ -55,3 +55,4 @@ vm-memory = { version = "0.10.0", features = ["backend-mmap", "backend-atomic",
vm-migration = { path = "../vm-migration" }
vm-virtio = { path = "../vm-virtio" }
vmm-sys-util = { version = "0.11.0", features = ["with-serde"] }
zerocopy = "0.6.1"

13
vmm/src/acpi.rs
View File

@ -9,7 +9,7 @@ use crate::pci_segment::PciSegment;
use crate::{GuestMemoryMmap, GuestRegionMmap};
#[cfg(target_arch = "aarch64")]
use acpi_tables::sdt::GenericAddress;
use acpi_tables::{aml::Aml, rsdp::Rsdp, sdt::Sdt};
use acpi_tables::{rsdp::Rsdp, sdt::Sdt, Aml};
#[cfg(target_arch = "aarch64")]
use arch::aarch64::DeviceInfoForFdt;
#[cfg(target_arch = "aarch64")]
@ -20,7 +20,8 @@ use pci::PciBdf;
use std::sync::{Arc, Mutex};
use std::time::Instant;
use tracer::trace_scoped;
use vm_memory::{Address, ByteValued, Bytes, GuestAddress, GuestMemoryRegion};
use vm_memory::{Address, Bytes, GuestAddress, GuestMemoryRegion};
use zerocopy::AsBytes;
/* Values for Type in APIC sub-headers */
#[cfg(target_arch = "x86_64")]
@ -179,9 +180,9 @@ pub fn create_dsdt_table(
let mut bytes = Vec::new();
device_manager.lock().unwrap().append_aml_bytes(&mut bytes);
cpu_manager.lock().unwrap().append_aml_bytes(&mut bytes);
memory_manager.lock().unwrap().append_aml_bytes(&mut bytes);
device_manager.lock().unwrap().to_aml_bytes(&mut bytes);
cpu_manager.lock().unwrap().to_aml_bytes(&mut bytes);
memory_manager.lock().unwrap().to_aml_bytes(&mut bytes);
dsdt.append_slice(&bytes);
dsdt
@ -811,7 +812,7 @@ pub fn create_acpi_tables(
// RSDP
let rsdp = Rsdp::new(*b"CLOUDH", xsdt_offset.0);
guest_mem
.write_slice(rsdp.as_slice(), rsdp_offset)
.write_slice(rsdp.as_bytes(), rsdp_offset)
.expect("Error writing RSDP");
info!(

48
vmm/src/cpu.rs
View File

@ -27,7 +27,7 @@ use crate::seccomp_filters::{get_seccomp_filter, Thread};
use crate::vm::physical_bits;
use crate::GuestMemoryMmap;
use crate::CPU_MANAGER_SNAPSHOT_ID;
use acpi_tables::{aml, aml::Aml, sdt::Sdt};
use acpi_tables::{aml, sdt::Sdt, Aml};
use anyhow::anyhow;
#[cfg(all(target_arch = "aarch64", feature = "guest_debug"))]
use arch::aarch64::regs;
@ -1717,7 +1717,7 @@ impl Cpu {
}
impl Aml for Cpu {
fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
fn to_aml_bytes(&self, sink: &mut dyn acpi_tables::AmlSink) {
#[cfg(target_arch = "x86_64")]
let mat_data: Vec<u8> = self.generate_mat();
#[allow(clippy::if_same_then_else)]
@ -1758,7 +1758,7 @@ impl Aml for Cpu {
// containing the LAPIC for this processor with the enabled bit set
// even it if is disabled in the MADT (non-boot CPU)
#[cfg(target_arch = "x86_64")]
&aml::Name::new("_MAT".into(), &aml::Buffer::new(mat_data)),
&aml::Name::new("_MAT".into(), &aml::BufferData::new(mat_data)),
// Trigger CPU ejection
#[cfg(target_arch = "x86_64")]
&aml::Method::new(
@ -1770,7 +1770,7 @@ impl Aml for Cpu {
),
],
)
.append_aml_bytes(bytes);
.to_aml_bytes(sink);
} else {
aml::Device::new(
format!("C{:03}", self.cpu_id).as_str().into(),
@ -1795,10 +1795,10 @@ impl Aml for Cpu {
// containing the LAPIC for this processor with the enabled bit set
// even it if is disabled in the MADT (non-boot CPU)
#[cfg(target_arch = "x86_64")]
&aml::Name::new("_MAT".into(), &aml::Buffer::new(mat_data)),
&aml::Name::new("_MAT".into(), &aml::BufferData::new(mat_data)),
],
)
.append_aml_bytes(bytes);
.to_aml_bytes(sink);
}
}
}
@ -1808,13 +1808,13 @@ struct CpuNotify {
}
impl Aml for CpuNotify {
fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
fn to_aml_bytes(&self, sink: &mut dyn acpi_tables::AmlSink) {
let object = aml::Path::new(&format!("C{:03}", self.cpu_id));
aml::If::new(
&aml::Equal::new(&aml::Arg(0), &self.cpu_id),
vec![&aml::Notify::new(&object, &aml::Arg(1))],
)
.append_aml_bytes(bytes)
.to_aml_bytes(sink)
}
}
@ -1824,7 +1824,7 @@ struct CpuMethods {
}
impl Aml for CpuMethods {
fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
fn to_aml_bytes(&self, sink: &mut dyn acpi_tables::AmlSink) {
if self.dynamic {
// CPU status method
aml::Method::new(
@ -1848,19 +1848,19 @@ impl Aml for CpuMethods {
&aml::Return::new(&aml::Local(0)),
],
)
.append_aml_bytes(bytes);
.to_aml_bytes(sink);
let mut cpu_notifies = Vec::new();
for cpu_id in 0..self.max_vcpus {
cpu_notifies.push(CpuNotify { cpu_id });
}
let mut cpu_notifies_refs: Vec<&dyn aml::Aml> = Vec::new();
let mut cpu_notifies_refs: Vec<&dyn Aml> = Vec::new();
for cpu_id in 0..self.max_vcpus {
cpu_notifies_refs.push(&cpu_notifies[usize::from(cpu_id)]);
}
aml::Method::new("CTFY".into(), 2, true, cpu_notifies_refs).append_aml_bytes(bytes);
aml::Method::new("CTFY".into(), 2, true, cpu_notifies_refs).to_aml_bytes(sink);
aml::Method::new(
"CEJ0".into(),
@ -1875,7 +1875,7 @@ impl Aml for CpuMethods {
&aml::Release::new("\\_SB_.PRES.CPLK".into()),
],
)
.append_aml_bytes(bytes);
.to_aml_bytes(sink);
aml::Method::new(
"CSCN".into(),
@ -1929,22 +1929,22 @@ impl Aml for CpuMethods {
&aml::Release::new("\\_SB_.PRES.CPLK".into()),
],
)
.append_aml_bytes(bytes)
.to_aml_bytes(sink)
} else {
aml::Method::new("CSCN".into(), 0, true, vec![]).append_aml_bytes(bytes)
aml::Method::new("CSCN".into(), 0, true, vec![]).to_aml_bytes(sink)
}
}
}
impl Aml for CpuManager {
fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
fn to_aml_bytes(&self, sink: &mut dyn acpi_tables::AmlSink) {
#[cfg(target_arch = "x86_64")]
if let Some(acpi_address) = self.acpi_address {
// CPU hotplug controller
aml::Device::new(
"_SB_.PRES".into(),
vec![
&aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0A06")),
&aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0A06")),
&aml::Name::new("_UID".into(), &"CPU Hotplug Controller"),
// Mutex to protect concurrent access as we write to choose CPU and then read back status
&aml::Mutex::new("CPLK".into(), 0),
@ -1961,12 +1961,13 @@ impl Aml for CpuManager {
&aml::OpRegion::new(
"PRST".into(),
aml::OpRegionSpace::SystemMemory,
acpi_address.0 as usize,
CPU_MANAGER_ACPI_SIZE,
&(acpi_address.0 as usize),
&CPU_MANAGER_ACPI_SIZE,
),
&aml::Field::new(
"PRST".into(),
aml::FieldAccessType::Byte,
aml::FieldLockRule::NoLock,
aml::FieldUpdateRule::WriteAsZeroes,
vec![
aml::FieldEntry::Reserved(32),
@ -1981,6 +1982,7 @@ impl Aml for CpuManager {
&aml::Field::new(
"PRST".into(),
aml::FieldAccessType::DWord,
aml::FieldLockRule::NoLock,
aml::FieldUpdateRule::Preserve,
vec![
aml::FieldEntry::Named(*b"CSEL", 32),
@ -1990,18 +1992,18 @@ impl Aml for CpuManager {
),
],
)
.append_aml_bytes(bytes);
.to_aml_bytes(sink);
}
// CPU devices
let hid = aml::Name::new("_HID".into(), &"ACPI0010");
let uid = aml::Name::new("_CID".into(), &aml::EisaName::new("PNP0A05"));
let uid = aml::Name::new("_CID".into(), &aml::EISAName::new("PNP0A05"));
// Bundle methods together under a common object
let methods = CpuMethods {
max_vcpus: self.config.max_vcpus,
dynamic: self.dynamic,
};
let mut cpu_data_inner: Vec<&dyn aml::Aml> = vec![&hid, &uid, &methods];
let mut cpu_data_inner: Vec<&dyn Aml> = vec![&hid, &uid, &methods];
let mut cpu_devices = Vec::new();
for cpu_id in 0..self.config.max_vcpus {
@ -2019,7 +2021,7 @@ impl Aml for CpuManager {
cpu_data_inner.push(cpu_device);
}
aml::Device::new("_SB_.CPUS".into(), cpu_data_inner).append_aml_bytes(bytes)
aml::Device::new("_SB_.CPUS".into(), cpu_data_inner).to_aml_bytes(sink)
}
}

41
vmm/src/device_manager.rs
View File

@ -26,7 +26,7 @@ use crate::GuestRegionMmap;
use crate::PciDeviceInfo;
use crate::{device_node, DEVICE_MANAGER_SNAPSHOT_ID};
use acpi_tables::sdt::GenericAddress;
use acpi_tables::{aml, aml::Aml};
use acpi_tables::{aml, Aml};
use anyhow::anyhow;
use arch::layout;
#[cfg(target_arch = "x86_64")]
@ -4228,7 +4228,7 @@ fn numa_node_id_from_memory_zone_id(numa_nodes: &NumaNodes, memory_zone_id: &str
struct TpmDevice {}
impl Aml for TpmDevice {
fn to_aml_bytes(&self) -> Vec<u8> {
fn to_aml_bytes(&self, sink: &mut dyn acpi_tables::AmlSink) {
aml::Device::new(
"TPM2".into(),
vec![
@ -4244,12 +4244,12 @@ impl Aml for TpmDevice {
),
],
)
.to_aml_bytes()
.to_aml_bytes(sink)
}
}
impl Aml for DeviceManager {
fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
fn to_aml_bytes(&self, sink: &mut dyn acpi_tables::AmlSink) {
#[cfg(target_arch = "aarch64")]
use arch::aarch64::DeviceInfoForFdt;
@ -4269,7 +4269,7 @@ impl Aml for DeviceManager {
aml::Device::new(
"_SB_.PHPR".into(),
vec![
&aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0A06")),
&aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0A06")),
&aml::Name::new("_STA".into(), &0x0bu8),
&aml::Name::new("_UID".into(), &"PCI Hotplug Controller"),
&aml::Mutex::new("BLCK".into(), 0),
@ -4286,12 +4286,13 @@ impl Aml for DeviceManager {
&aml::OpRegion::new(
"PCST".into(),
aml::OpRegionSpace::SystemMemory,
self.acpi_address.0 as usize,
DEVICE_MANAGER_ACPI_SIZE,
&(self.acpi_address.0 as usize),
&DEVICE_MANAGER_ACPI_SIZE,
),
&aml::Field::new(
"PCST".into(),
aml::FieldAccessType::DWord,
aml::FieldLockRule::NoLock,
aml::FieldUpdateRule::WriteAsZeroes,
vec![
aml::FieldEntry::Named(*b"PCIU", 32),
@ -4320,10 +4321,10 @@ impl Aml for DeviceManager {
&aml::Method::new("PSCN".into(), 0, true, pci_scan_inner),
],
)
.append_aml_bytes(bytes);
.to_aml_bytes(sink);
for segment in &self.pci_segments {
segment.append_aml_bytes(bytes);
segment.to_aml_bytes(sink);
}
let mut mbrd_memory = Vec::new();
@ -4344,12 +4345,12 @@ impl Aml for DeviceManager {
aml::Device::new(
"_SB_.MBRD".into(),
vec![
&aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0C02")),
&aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0C02")),
&aml::Name::new("_UID".into(), &aml::ZERO),
&aml::Name::new("_CRS".into(), &aml::ResourceTemplate::new(mbrd_memory_refs)),
],
)
.append_aml_bytes(bytes);
.to_aml_bytes(sink);
// Serial device
#[cfg(target_arch = "x86_64")]
@ -4373,7 +4374,7 @@ impl Aml for DeviceManager {
&aml::Name::new(
"_HID".into(),
#[cfg(target_arch = "x86_64")]
&aml::EisaName::new("PNP0501"),
&aml::EISAName::new("PNP0501"),
#[cfg(target_arch = "aarch64")]
&"ARMH0011",
),
@ -4384,7 +4385,7 @@ impl Aml for DeviceManager {
&aml::ResourceTemplate::new(vec![
&aml::Interrupt::new(true, true, false, false, serial_irq),
#[cfg(target_arch = "x86_64")]
&aml::Io::new(0x3f8, 0x3f8, 0, 0x8),
&aml::IO::new(0x3f8, 0x3f8, 0, 0x8),
#[cfg(target_arch = "aarch64")]
&aml::Memory32Fixed::new(
true,
@ -4395,25 +4396,23 @@ impl Aml for DeviceManager {
),
],
)
.append_aml_bytes(bytes);
.to_aml_bytes(sink);
}
aml::Name::new("_S5_".into(), &aml::Package::new(vec![&5u8])).append_aml_bytes(bytes);
aml::Name::new("_S5_".into(), &aml::Package::new(vec![&5u8])).to_aml_bytes(sink);
aml::Device::new(
"_SB_.PWRB".into(),
vec![
&aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0C0C")),
&aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0C0C")),
&aml::Name::new("_UID".into(), &aml::ZERO),
],
)
.append_aml_bytes(bytes);
.to_aml_bytes(sink);
if self.config.lock().unwrap().tpm.is_some() {
// Add tpm device
let tpm_acpi = TpmDevice {};
let tpm_dsdt_data = tpm_acpi.to_aml_bytes();
bytes.extend_from_slice(tpm_dsdt_data.as_slice());
TpmDevice {}.to_aml_bytes(sink);
}
self.ged_notification_device
@ -4421,7 +4420,7 @@ impl Aml for DeviceManager {
.unwrap()
.lock()
.unwrap()
.append_aml_bytes(bytes);
.to_aml_bytes(sink)
}
}

86
vmm/src/memory_manager.rs
View File

@ -12,7 +12,7 @@ use crate::coredump::{
use crate::migration::url_to_path;
use crate::MEMORY_MANAGER_SNAPSHOT_ID;
use crate::{GuestMemoryMmap, GuestRegionMmap};
use acpi_tables::{aml, aml::Aml};
use acpi_tables::{aml, Aml};
use anyhow::anyhow;
#[cfg(target_arch = "x86_64")]
use arch::x86_64::{SgxEpcRegion, SgxEpcSection};
@ -2094,13 +2094,13 @@ struct MemoryNotify {
}
impl Aml for MemoryNotify {
fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
fn to_aml_bytes(&self, sink: &mut dyn acpi_tables::AmlSink) {
let object = aml::Path::new(&format!("M{:03}", self.slot_id));
aml::If::new(
&aml::Equal::new(&aml::Arg(0), &self.slot_id),
vec![&aml::Notify::new(&object, &aml::Arg(1))],
)
.append_aml_bytes(bytes)
.to_aml_bytes(sink)
}
}
@ -2109,11 +2109,11 @@ struct MemorySlot {
}
impl Aml for MemorySlot {
fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
fn to_aml_bytes(&self, sink: &mut dyn acpi_tables::AmlSink) {
aml::Device::new(
format!("M{:03}", self.slot_id).as_str().into(),
vec![
&aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0C80")),
&aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0C80")),
&aml::Name::new("_UID".into(), &self.slot_id),
/*
_STA return value:
@ -2147,7 +2147,7 @@ impl Aml for MemorySlot {
),
],
)
.append_aml_bytes(bytes)
.to_aml_bytes(sink)
}
}
@ -2156,9 +2156,9 @@ struct MemorySlots {
}
impl Aml for MemorySlots {
fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
fn to_aml_bytes(&self, sink: &mut dyn acpi_tables::AmlSink) {
for slot_id in 0..self.slots {
MemorySlot { slot_id }.append_aml_bytes(bytes);
MemorySlot { slot_id }.to_aml_bytes(sink);
}
}
}
@ -2168,19 +2168,19 @@ struct MemoryMethods {
}
impl Aml for MemoryMethods {
fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
fn to_aml_bytes(&self, sink: &mut dyn acpi_tables::AmlSink) {
// Add "MTFY" notification method
let mut memory_notifies = Vec::new();
for slot_id in 0..self.slots {
memory_notifies.push(MemoryNotify { slot_id });
}
let mut memory_notifies_refs: Vec<&dyn aml::Aml> = Vec::new();
let mut memory_notifies_refs: Vec<&dyn Aml> = Vec::new();
for memory_notifier in memory_notifies.iter() {
memory_notifies_refs.push(memory_notifier);
}
aml::Method::new("MTFY".into(), 2, true, memory_notifies_refs).append_aml_bytes(bytes);
aml::Method::new("MTFY".into(), 2, true, memory_notifies_refs).to_aml_bytes(sink);
// MSCN method
aml::Method::new(
@ -2226,7 +2226,7 @@ impl Aml for MemoryMethods {
&aml::Release::new("MLCK".into()),
],
)
.append_aml_bytes(bytes);
.to_aml_bytes(sink);
// Memory status method
aml::Method::new(
@ -2250,7 +2250,7 @@ impl Aml for MemoryMethods {
&aml::Return::new(&aml::Local(0)),
],
)
.append_aml_bytes(bytes);
.to_aml_bytes(sink);
// Memory range method
aml::Method::new(
@ -2271,12 +2271,36 @@ impl Aml for MemoryMethods {
0xFFFF_FFFF_FFFF_FFFEu64,
)]),
),
&aml::CreateField::<u64>::new(&aml::Path::new("MR64"), &14usize, "MINL".into()),
&aml::CreateField::<u32>::new(&aml::Path::new("MR64"), &18usize, "MINH".into()),
&aml::CreateField::<u64>::new(&aml::Path::new("MR64"), &22usize, "MAXL".into()),
&aml::CreateField::<u32>::new(&aml::Path::new("MR64"), &26usize, "MAXH".into()),
&aml::CreateField::<u64>::new(&aml::Path::new("MR64"), &38usize, "LENL".into()),
&aml::CreateField::<u32>::new(&aml::Path::new("MR64"), &42usize, "LENH".into()),
&aml::CreateQWordField::new(
&aml::Path::new("MINL"),
&aml::Path::new("MR64"),
&14usize,
),
&aml::CreateDWordField::new(
&aml::Path::new("MINH"),
&aml::Path::new("MR64"),
&18usize,
),
&aml::CreateQWordField::new(
&aml::Path::new("MAXL"),
&aml::Path::new("MR64"),
&22usize,
),
&aml::CreateDWordField::new(
&aml::Path::new("MAXH"),
&aml::Path::new("MR64"),
&26usize,
),
&aml::CreateQWordField::new(
&aml::Path::new("LENL"),
&aml::Path::new("MR64"),
&38usize,
),
&aml::CreateDWordField::new(
&aml::Path::new("LENH"),
&aml::Path::new("MR64"),
&42usize,
),
&aml::Store::new(&aml::Path::new("MINL"), &aml::Path::new("\\_SB_.MHPC.MHBL")),
&aml::Store::new(&aml::Path::new("MINH"), &aml::Path::new("\\_SB_.MHPC.MHBH")),
&aml::Store::new(&aml::Path::new("LENL"), &aml::Path::new("\\_SB_.MHPC.MHLL")),
@ -2305,18 +2329,18 @@ impl Aml for MemoryMethods {
&aml::Return::new(&aml::Path::new("MR64")),
],
)
.append_aml_bytes(bytes)
.to_aml_bytes(sink)
}
}
impl Aml for MemoryManager {
fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
fn to_aml_bytes(&self, sink: &mut dyn acpi_tables::AmlSink) {
if let Some(acpi_address) = self.acpi_address {
// Memory Hotplug Controller
aml::Device::new(
"_SB_.MHPC".into(),
vec![
&aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0A06")),
&aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0A06")),
&aml::Name::new("_UID".into(), &"Memory Hotplug Controller"),
// Mutex to protect concurrent access as we write to choose slot and then read back status
&aml::Mutex::new("MLCK".into(), 0),
@ -2333,12 +2357,13 @@ impl Aml for MemoryManager {
&aml::OpRegion::new(
"MHPR".into(),
aml::OpRegionSpace::SystemMemory,
acpi_address.0 as usize,
MEMORY_MANAGER_ACPI_SIZE,
&(acpi_address.0 as usize),
&MEMORY_MANAGER_ACPI_SIZE,
),
&aml::Field::new(
"MHPR".into(),
aml::FieldAccessType::DWord,
aml::FieldLockRule::NoLock,
aml::FieldUpdateRule::Preserve,
vec![
aml::FieldEntry::Named(*b"MHBL", 32), // Base (low 4 bytes)
@ -2350,6 +2375,7 @@ impl Aml for MemoryManager {
&aml::Field::new(
"MHPR".into(),
aml::FieldAccessType::DWord,
aml::FieldLockRule::NoLock,
aml::FieldUpdateRule::Preserve,
vec![
aml::FieldEntry::Reserved(128),
@ -2359,6 +2385,7 @@ impl Aml for MemoryManager {
&aml::Field::new(
"MHPR".into(),
aml::FieldAccessType::Byte,
aml::FieldLockRule::NoLock,
aml::FieldUpdateRule::WriteAsZeroes,
vec![
aml::FieldEntry::Reserved(160),
@ -2371,6 +2398,7 @@ impl Aml for MemoryManager {
&aml::Field::new(
"MHPR".into(),
aml::FieldAccessType::DWord,
aml::FieldLockRule::NoLock,
aml::FieldUpdateRule::Preserve,
vec![
aml::FieldEntry::Named(*b"MSEL", 32), // Selector
@ -2386,18 +2414,18 @@ impl Aml for MemoryManager {
},
],
)
.append_aml_bytes(bytes);
.to_aml_bytes(sink);
} else {
aml::Device::new(
"_SB_.MHPC".into(),
vec![
&aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0A06")),
&aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0A06")),
&aml::Name::new("_UID".into(), &"Memory Hotplug Controller"),
// Empty MSCN for GED
&aml::Method::new("MSCN".into(), 0, true, vec![]),
],
)
.append_aml_bytes(bytes);
.to_aml_bytes(sink);
}
#[cfg(target_arch = "x86_64")]
@ -2409,7 +2437,7 @@ impl Aml for MemoryManager {
aml::Device::new(
"_SB_.EPC_".into(),
vec![
&aml::Name::new("_HID".into(), &aml::EisaName::new("INT0E0C")),
&aml::Name::new("_HID".into(), &aml::EISAName::new("INT0E0C")),
// QWORD describing the EPC region start and size
&aml::Name::new(
"_CRS".into(),
@ -2423,7 +2451,7 @@ impl Aml for MemoryManager {
&aml::Method::new("_STA".into(), 0, false, vec![&aml::Return::new(&0xfu8)]),
],
)
.append_aml_bytes(bytes);
.to_aml_bytes(sink);
}
}
}

42
vmm/src/pci_segment.rs
View File

@ -10,7 +10,7 @@
//
use crate::device_manager::{AddressManager, DeviceManagerError, DeviceManagerResult};
use acpi_tables::aml::{self, Aml};
use acpi_tables::{self, aml, Aml};
use arch::layout;
use pci::{DeviceRelocation, PciBdf, PciBus, PciConfigMmio, PciRoot};
#[cfg(target_arch = "x86_64")]
@ -171,7 +171,7 @@ struct PciDevSlot {
}
impl Aml for PciDevSlot {
fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
fn to_aml_bytes(&self, sink: &mut dyn acpi_tables::AmlSink) {
let sun = self.device_id;
let adr: u32 = (self.device_id as u32) << 16;
aml::Device::new(
@ -190,7 +190,7 @@ impl Aml for PciDevSlot {
),
],
)
.append_aml_bytes(bytes)
.to_aml_bytes(sink)
}
}
@ -199,33 +199,33 @@ struct PciDevSlotNotify {
}
impl Aml for PciDevSlotNotify {
fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
fn to_aml_bytes(&self, sink: &mut dyn acpi_tables::AmlSink) {
let device_id_mask: u32 = 1 << self.device_id;
let object = aml::Path::new(&format!("S{:03}", self.device_id));
aml::And::new(&aml::Local(0), &aml::Arg(0), &device_id_mask).append_aml_bytes(bytes);
aml::And::new(&aml::Local(0), &aml::Arg(0), &device_id_mask).to_aml_bytes(sink);
aml::If::new(
&aml::Equal::new(&aml::Local(0), &device_id_mask),
vec![&aml::Notify::new(&object, &aml::Arg(1))],
)
.append_aml_bytes(bytes);
.to_aml_bytes(sink);
}
}
struct PciDevSlotMethods {}
impl Aml for PciDevSlotMethods {
fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
fn to_aml_bytes(&self, sink: &mut dyn acpi_tables::AmlSink) {
let mut device_notifies = Vec::new();
for device_id in 0..32 {
device_notifies.push(PciDevSlotNotify { device_id });
}
let mut device_notifies_refs: Vec<&dyn aml::Aml> = Vec::new();
let mut device_notifies_refs: Vec<&dyn Aml> = Vec::new();
for device_notify in device_notifies.iter() {
device_notifies_refs.push(device_notify);
}
aml::Method::new("DVNT".into(), 2, true, device_notifies_refs).append_aml_bytes(bytes);
aml::Method::new("DVNT".into(), 2, true, device_notifies_refs).to_aml_bytes(sink);
aml::Method::new(
"PCNT".into(),
0,
@ -244,14 +244,14 @@ impl Aml for PciDevSlotMethods {
&aml::Release::new("\\_SB_.PHPR.BLCK".into()),
],
)
.append_aml_bytes(bytes)
.to_aml_bytes(sink)
}
}
struct PciDsmMethod {}
impl Aml for PciDsmMethod {
fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
fn to_aml_bytes(&self, sink: &mut dyn acpi_tables::AmlSink) {
// Refer to ACPI spec v6.3 Ch 9.1.1 and PCI Firmware spec v3.3 Ch 4.6.1
// _DSM (Device Specific Method), the following is the implementation in ASL.
/*
@ -292,11 +292,11 @@ impl Aml for PciDsmMethod {
false,
vec![
&aml::If::new(
&aml::Equal::new(&aml::Arg(0), &aml::Buffer::new(uuid_buf)),
&aml::Equal::new(&aml::Arg(0), &aml::BufferData::new(uuid_buf)),
vec![
&aml::If::new(
&aml::Equal::new(&aml::Arg(2), &aml::ZERO),
vec![&aml::Return::new(&aml::Buffer::new(vec![0x21]))],
vec![&aml::Return::new(&aml::BufferData::new(vec![0x21]))],
),
&aml::If::new(
&aml::Equal::new(&aml::Arg(2), &0x05u8),
@ -304,19 +304,19 @@ impl Aml for PciDsmMethod {
),
],
),
&aml::Return::new(&aml::Buffer::new(vec![0])),
&aml::Return::new(&aml::BufferData::new(vec![0])),
],
)
.append_aml_bytes(bytes)
.to_aml_bytes(sink)
}
}
impl Aml for PciSegment {
fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
let mut pci_dsdt_inner_data: Vec<&dyn aml::Aml> = Vec::new();
let hid = aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0A08"));
fn to_aml_bytes(&self, sink: &mut dyn acpi_tables::AmlSink) {
let mut pci_dsdt_inner_data: Vec<&dyn Aml> = Vec::new();
let hid = aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0A08"));
pci_dsdt_inner_data.push(&hid);
let cid = aml::Name::new("_CID".into(), &aml::EisaName::new("PNP0A03"));
let cid = aml::Name::new("_CID".into(), &aml::EISAName::new("PNP0A03"));
pci_dsdt_inner_data.push(&cid);
let adr = aml::Name::new("_ADR".into(), &aml::ZERO);
pci_dsdt_inner_data.push(&adr);
@ -346,7 +346,7 @@ impl Aml for PciSegment {
&aml::ResourceTemplate::new(vec![
&aml::AddressSpace::new_bus_number(0x0u16, 0x0u16),
#[cfg(target_arch = "x86_64")]
&aml::Io::new(0xcf8, 0xcf8, 1, 0x8),
&aml::IO::new(0xcf8, 0xcf8, 1, 0x8),
&aml::AddressSpace::new_memory(
aml::AddressSpaceCachable::NotCacheable,
true,
@ -421,6 +421,6 @@ impl Aml for PciSegment {
format!("_SB_.PCI{:X}", self.id).as_str().into(),
pci_dsdt_inner_data,
)
.append_aml_bytes(bytes)
.to_aml_bytes(sink)
}
}