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https://github.com/cloud-hypervisor/cloud-hypervisor.git
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vmm: acpi: Support compiling ACPI code on aarch64
This skeleton commit brings in the support for compiling aarch64 with the "acpi" feature ready to the ACPI enabling. It builds on the work to move the ACPI hotplug devices from I/O ports to MMIO and conditionalises any code that is x86_64 only (i.e. because it uses an I/O port.) Filling in the aarch64 specific details in tables such as the MADT it out of the scope. See: #2178 Signed-off-by: Rob Bradford <robert.bradford@intel.com>
This commit is contained in:
Rob Bradford
Michael
parent
7659055eec
commit
76e15a4240
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@ -6,12 +6,10 @@ use crate::cpu::CpuManager;
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use crate::device_manager::DeviceManager;
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use crate::memory_manager::MemoryManager;
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use crate::vm::NumaNodes;
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use acpi_tables::{
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aml::Aml,
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rsdp::RSDP,
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sdt::{GenericAddress, SDT},
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};
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use arch::layout;
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#[cfg(target_arch = "x86_64")]
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use acpi_tables::sdt::GenericAddress;
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use acpi_tables::{aml::Aml, rsdp::RSDP, sdt::SDT};
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use bitflags::bitflags;
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use std::sync::{Arc, Mutex};
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use vm_memory::GuestRegionMmap;
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@ -114,8 +112,16 @@ pub fn create_acpi_tables(
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memory_manager: &Arc<Mutex<MemoryManager>>,
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numa_nodes: &NumaNodes,
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) -> GuestAddress {
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#[cfg(target_arch = "x86_64")]
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// RSDP is at the EBDA
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let rsdp_offset = layout::RSDP_POINTER;
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let rsdp_offset = arch::layout::RSDP_POINTER;
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#[cfg(target_arch = "aarch64")]
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// TODO: For aarch64 place the ACPI tables in the last MiB of guest RAM
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let rsdp_offset = {
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use vm_memory::GuestMemory;
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guest_mem.last_addr().checked_sub(1 << 20).unwrap()
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};
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let mut tables: Vec<u64> = Vec::new();
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// DSDT
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@ -130,6 +136,7 @@ pub fn create_acpi_tables(
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let mut facp = SDT::new(*b"FACP", 276, 6, *b"CLOUDH", *b"CHFACP ", 1);
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// PM_TMR_BLK I/O port
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#[cfg(target_arch = "x86_64")]
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facp.write(76, 0xb008u32);
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// HW_REDUCED_ACPI, RESET_REG_SUP, TMR_VAL_EXT
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@ -137,19 +144,24 @@ pub fn create_acpi_tables(
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facp.write(112, fadt_flags);
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// RESET_REG
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#[cfg(target_arch = "x86_64")]
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facp.write(116, GenericAddress::io_port_address::<u8>(0x3c0));
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// RESET_VALUE
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#[cfg(target_arch = "x86_64")]
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facp.write(128, 1u8);
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facp.write(131, 3u8); // FADT minor version
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facp.write(140, dsdt_offset.0); // X_DSDT
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// X_PM_TMR_BLK
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#[cfg(target_arch = "x86_64")]
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facp.write(208, GenericAddress::io_port_address::<u32>(0xb008));
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// SLEEP_CONTROL_REG
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#[cfg(target_arch = "x86_64")]
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facp.write(244, GenericAddress::io_port_address::<u8>(0x3c0));
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// SLEEP_STATUS_REG
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#[cfg(target_arch = "x86_64")]
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facp.write(256, GenericAddress::io_port_address::<u8>(0x3c0));
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facp.write(268, b"CLOUDHYP"); // Hypervisor Vendor Identity
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@ -177,7 +189,7 @@ pub fn create_acpi_tables(
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// 32-bit PCI enhanced configuration mechanism
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mcfg.append(PCIRangeEntry {
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base_address: layout::PCI_MMCONFIG_START.0,
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base_address: arch::layout::PCI_MMCONFIG_START.0,
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segment: 0,
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start: 0,
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end: 0,
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@ -22,8 +22,6 @@ use crate::CPU_MANAGER_SNAPSHOT_ID;
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#[cfg(feature = "acpi")]
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use acpi_tables::{aml, aml::Aml, sdt::SDT};
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use anyhow::anyhow;
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#[cfg(feature = "acpi")]
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use arch::layout;
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#[cfg(target_arch = "x86_64")]
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use arch::x86_64::SgxEpcSection;
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#[cfg(target_arch = "x86_64")]
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@ -1031,40 +1029,48 @@ impl CpuManager {
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assert!(self.config.boot_vcpus <= self.config.max_vcpus);
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let mut madt = SDT::new(*b"APIC", 44, 5, *b"CLOUDH", *b"CHMADT ", 1);
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madt.write(36, layout::APIC_START);
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#[cfg(target_arch = "x86_64")]
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{
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madt.write(36, arch::layout::APIC_START);
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for cpu in 0..self.config.max_vcpus {
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let lapic = LocalAPIC {
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r#type: 0,
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length: 8,
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processor_id: cpu,
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apic_id: cpu,
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flags: if cpu < self.config.boot_vcpus {
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1 << MADT_CPU_ENABLE_FLAG
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} else {
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0
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},
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};
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madt.append(lapic);
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for cpu in 0..self.config.max_vcpus {
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let lapic = LocalAPIC {
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r#type: 0,
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length: 8,
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processor_id: cpu,
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apic_id: cpu,
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flags: if cpu < self.config.boot_vcpus {
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1 << MADT_CPU_ENABLE_FLAG
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} else {
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0
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},
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};
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madt.append(lapic);
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}
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madt.append(IOAPIC {
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r#type: 1,
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length: 12,
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ioapic_id: 0,
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apic_address: arch::layout::IOAPIC_START.0 as u32,
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gsi_base: 0,
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..Default::default()
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});
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madt.append(InterruptSourceOverride {
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r#type: 2,
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length: 10,
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bus: 0,
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source: 4,
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gsi: 4,
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flags: 0,
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});
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}
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madt.append(IOAPIC {
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r#type: 1,
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length: 12,
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ioapic_id: 0,
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apic_address: layout::IOAPIC_START.0 as u32,
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gsi_base: 0,
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..Default::default()
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});
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madt.append(InterruptSourceOverride {
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r#type: 2,
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length: 10,
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bus: 0,
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source: 4,
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gsi: 4,
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flags: 0,
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});
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#[cfg(target_arch = "aarch64")]
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{
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madt.update_checksum();
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}
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madt
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}
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@ -1201,17 +1201,20 @@ impl DeviceManager {
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self.bus_devices
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.push(Arc::clone(&shutdown_device) as Arc<Mutex<dyn BusDevice>>);
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self.address_manager
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.allocator
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.lock()
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.unwrap()
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.allocate_io_addresses(Some(GuestAddress(0x3c0)), 0x8, None)
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.ok_or(DeviceManagerError::AllocateIOPort)?;
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#[cfg(target_arch = "x86_64")]
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{
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self.address_manager
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.allocator
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.lock()
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.unwrap()
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.allocate_io_addresses(Some(GuestAddress(0x3c0)), 0x8, None)
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.ok_or(DeviceManagerError::AllocateIOPort)?;
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self.address_manager
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.io_bus
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.insert(shutdown_device, 0x3c0, 0x4)
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.map_err(DeviceManagerError::BusError)?;
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self.address_manager
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.io_bus
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.insert(shutdown_device, 0x3c0, 0x4)
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.map_err(DeviceManagerError::BusError)?;
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}
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let ged_irq = self
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.address_manager
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@ -1253,17 +1256,20 @@ impl DeviceManager {
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self.bus_devices
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.push(Arc::clone(&pm_timer_device) as Arc<Mutex<dyn BusDevice>>);
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self.address_manager
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.allocator
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.lock()
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.unwrap()
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.allocate_io_addresses(Some(GuestAddress(0xb008)), 0x4, None)
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.ok_or(DeviceManagerError::AllocateIOPort)?;
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#[cfg(target_arch = "x86_64")]
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{
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self.address_manager
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.allocator
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.lock()
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.unwrap()
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.allocate_io_addresses(Some(GuestAddress(0xb008)), 0x4, None)
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.ok_or(DeviceManagerError::AllocateIOPort)?;
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self.address_manager
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.io_bus
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.insert(pm_timer_device, 0xb008, 0x4)
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.map_err(DeviceManagerError::BusError)?;
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self.address_manager
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.io_bus
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.insert(pm_timer_device, 0xb008, 0x4)
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.map_err(DeviceManagerError::BusError)?;
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}
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Ok(Some(ged_device))
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}
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@ -1033,6 +1033,17 @@ impl Vm {
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let pci_space = (pci_space_start.0, pci_space_size);
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#[cfg(feature = "acpi")]
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{
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let _ = crate::acpi::create_acpi_tables(
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&mem,
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&self.device_manager,
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&self.cpu_manager,
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&self.memory_manager,
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&self.numa_nodes,
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);
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}
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// Call `configure_system` and pass the GIC devices out, so that
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// we can register the GIC device to the device manager.
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let gic_device = arch::configure_system(
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