From 78895dcc37b1fd4a52aa336cacafc3683e4195f5 Mon Sep 17 00:00:00 2001 From: Muminul Islam Date: Fri, 25 Oct 2024 16:08:35 -0700 Subject: [PATCH] hypervisor: mshv: clear exitinfo1 using mapped ghcb address After handling the VMG exit vmm needs to clear the exitinfo1 into the GHCB page. This patch replaces the old method(gpa_write) and clear the exitinfo1 using mapped GHCB struct. Signed-off-by: Muminul Islam --- hypervisor/src/mshv/mod.rs | 22 +++++++++++----------- hypervisor/src/mshv/snp_constants.rs | 1 - 2 files changed, 11 insertions(+), 12 deletions(-) diff --git a/hypervisor/src/mshv/mod.rs b/hypervisor/src/mshv/mod.rs index c163b17cf..83a8d0361 100644 --- a/hypervisor/src/mshv/mod.rs +++ b/hypervisor/src/mshv/mod.rs @@ -950,7 +950,7 @@ impl cpu::Vcpu for MshvVcpu { )?; // Clear the SW_EXIT_INFO1 register to indicate no error - self.clear_swexit_info1(ghcb_gpa)?; + self.clear_swexit_info1()?; } SVM_NAE_HV_DOORBELL_PAGE_QUERY => { let mut reg_assocs = [ hv_register_assoc { @@ -967,7 +967,7 @@ impl cpu::Vcpu for MshvVcpu { )?; // Clear the SW_EXIT_INFO1 register to indicate no error - self.clear_swexit_info1(ghcb_gpa)?; + self.clear_swexit_info1()?; } SVM_NAE_HV_DOORBELL_PAGE_CLEAR => { self.gpa_write( @@ -1030,7 +1030,7 @@ impl cpu::Vcpu for MshvVcpu { } // Clear the SW_EXIT_INFO1 register to indicate no error - self.clear_swexit_info1(ghcb_gpa)?; + self.clear_swexit_info1()?; } SVM_EXITCODE_MMIO_READ => { let src_gpa = @@ -1052,7 +1052,7 @@ impl cpu::Vcpu for MshvVcpu { self.gpa_write(dst_gpa, &data)?; // Clear the SW_EXIT_INFO1 register to indicate no error - self.clear_swexit_info1(ghcb_gpa)?; + self.clear_swexit_info1()?; } SVM_EXITCODE_MMIO_WRITE => { let dst_gpa = @@ -1074,7 +1074,7 @@ impl cpu::Vcpu for MshvVcpu { } // Clear the SW_EXIT_INFO1 register to indicate no error - self.clear_swexit_info1(ghcb_gpa)?; + self.clear_swexit_info1()?; } SVM_EXITCODE_SNP_GUEST_REQUEST | SVM_EXITCODE_SNP_EXTENDED_GUEST_REQUEST => { @@ -1133,7 +1133,7 @@ impl cpu::Vcpu for MshvVcpu { .map_err(|e| cpu::HypervisorCpuError::RunVcpu(e.into()))?; // Clear the SW_EXIT_INFO1 register to indicate no error - self.clear_swexit_info1(ghcb_gpa)?; + self.clear_swexit_info1()?; } _ => panic!( "GHCB_INFO_NORMAL: Unhandled exit code: {:0x}", @@ -1511,12 +1511,12 @@ impl MshvVcpu { /// Clear SW_EXIT_INFO1 register for SEV-SNP guests. /// #[cfg(feature = "sev_snp")] - fn clear_swexit_info1( - &self, - ghcb_gpa: u64, - ) -> std::result::Result { + fn clear_swexit_info1(&self) -> std::result::Result { // Clear the SW_EXIT_INFO1 register to indicate no error - self.gpa_write(ghcb_gpa + GHCB_SW_EXITINFO1_OFFSET, &[0; 4])?; + // Safe to use unwrap, for sev_snp guest we already have the + // GHCB pointer wrapped in the option, otherwise this place is not reached. + let ghcb = self.ghcb.as_ref().unwrap().0; + set_svm_field_u64_ptr!(ghcb, exit_info1, 0); Ok(cpu::VmExit::Ignore) } diff --git a/hypervisor/src/mshv/snp_constants.rs b/hypervisor/src/mshv/snp_constants.rs index 69b123647..5273244f3 100644 --- a/hypervisor/src/mshv/snp_constants.rs +++ b/hypervisor/src/mshv/snp_constants.rs @@ -21,5 +21,4 @@ pub const ECDSA_SIG_Y_COMPONENT_END: usize = // Link: https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/specifications/56421.pdf pub const GHCB_RAX_OFFSET: u64 = 0x01F8; pub const GHCB_RBX_OFFSET: u64 = 0x0318; -pub const GHCB_SW_EXITINFO1_OFFSET: u64 = 0x398; pub const GHCB_SW_EXITINFO2_OFFSET: u64 = 0x3A0;