misc: Fix various spelling errors using typos

This fixes all typos found by the typos utility with respect to the config file.

Signed-off-by: Philipp Schuster <philipp.schuster@cyberus-technology.de>
This commit is contained in:
Philipp Schuster 2023-08-31 15:00:19 +02:00 committed by Rob Bradford
parent fa09045f55
commit 7bf0cc1ed5
40 changed files with 79 additions and 79 deletions

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@ -5,7 +5,7 @@ License](https://opensource.org/licenses/Apache-2.0) and the [BSD 3
Clause](https://opensource.org/licenses/BSD-3-Clause) license. Individual files
contain details of their licensing and changes to that file are under the same
license unless the contribution changes the license of the file. When importing
code from a third party project (e.g. Firecracker or CrosVM) please respect the
code from a third party project (e.g. Firecracker or crosvm) please respect the
license of those projects.
New code should be under the [Apache v2

2
Jenkinsfile vendored
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@ -22,7 +22,7 @@ pipeline {
steps {
script {
runWorkers = false
echo 'No changes requring a build'
echo 'No changes requiring a build'
}
}
}

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@ -98,7 +98,7 @@ fn tdvf_descriptor_offset(file: &mut File) -> Result<(SeekFrom, bool), TdvfError
// We start after the footer GUID and the table length.
let mut offset = table_size - 18;
debug!("Parsing GUIDed structure");
debug!("Parsing GUID structure");
while offset >= 18 {
let entry_uuid = Uuid::from_slice_le(&table[offset - 16..offset])
.map_err(TdvfError::UuidCreation)?;

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@ -137,7 +137,7 @@ pub fn build_disk_image_id(disk_path: &Path) -> Vec<u8> {
pub enum ExecuteError {
#[error("Bad request: {0}")]
BadRequest(Error),
#[error("Falied to flush: {0}")]
#[error("Failed to flush: {0}")]
Flush(io::Error),
#[error("Failed to read: {0}")]
Read(GuestMemoryError),

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@ -81,7 +81,7 @@ pub enum VhdxHeaderError {
SeekRegionTableEntries(#[source] io::Error),
#[error("Failed to seek in region table header {0}")]
SeekRegionTableHeader(#[source] io::Error),
#[error("We do not recongize this entry")]
#[error("We do not recognize this entry")]
UnrecognizedRegionEntry,
#[error("Failed to write header {0}")]
WriteHeader(#[source] io::Error),
@ -305,7 +305,7 @@ impl RegionInfo {
if (entry.required & REGION_ENTRY_REQUIRED) == 1 {
// This implementation doesn't recognize this field.
// Therefore, accoding to the spec, we are throwing an error.
// Therefore, according to the spec, we are throwing an error.
return Err(VhdxHeaderError::UnrecognizedRegionEntry);
}
}
@ -444,7 +444,7 @@ impl VhdxHeader {
}
}
// Update the provided headers accoding to the spec
// Update the provided headers according to the spec
fn update_headers(
f: &mut File,
header_1: Result<Header>,
@ -468,7 +468,7 @@ impl VhdxHeader {
}
}
/// Calculates the checksum of a buffer that itself containts its checksum
/// Calculates the checksum of a buffer that itself contains its checksum
/// Therefore, before calculating, the existing checksum is retrieved and the
/// corresponding field is made zero. After the calculation, the existing checksum
/// is put back to the buffer.

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@ -96,7 +96,7 @@ pub struct DiskSpec {
}
impl DiskSpec {
/// Parse all meatadata from the provided file and store info in DiskSpec
/// Parse all metadata from the provided file and store info in DiskSpec
/// structure.
pub fn new(f: &mut File, metadata_region: &RegionTableEntry) -> Result<DiskSpec> {
let mut disk_spec = DiskSpec::default();

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@ -27,7 +27,7 @@ pub const IRQ_LEGACY_BASE: usize = layout::IRQ_BASE as usize;
pub const IRQ_LEGACY_COUNT: usize = 32;
pub const GIC_SNAPSHOT_ID: &str = "gic-v3-its";
// Gic (Generic Interupt Controller) struct provides all the functionality of a
// Gic (Generic Interrupt Controller) struct provides all the functionality of a
// GIC device. It wraps a hypervisor-emulated GIC device (Vgic) provided by the
// `hypervisor` crate.
// Gic struct also implements InterruptController to provide interrupt delivery

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@ -31,7 +31,7 @@ const GPIOIC: u64 = 0x41c; // Interrupt Clear Register
const GPIOAFSEL: u64 = 0x420; // Mode Control Select Register
// From 0x424 to 0xFDC => reserved space.
// From 0xFE0 to 0xFFC => Peripheral and PrimeCell Identification Registers which are Read Only registers.
// Thses registers can conceptually be treated as a 32-bit register, and PartNumber[11:0] is used to identify the peripheral.
// These registers can conceptually be treated as a 32-bit register, and PartNumber[11:0] is used to identify the peripheral.
// We are putting the expected values (look at 'Reset value' column from above mentioned document) in an array.
const GPIO_ID: [u8; 8] = [0x61, 0x10, 0x14, 0x00, 0x0d, 0xf0, 0x05, 0xb1];
// ID Margins
@ -57,7 +57,7 @@ impl fmt::Display for Error {
write!(f, "Could not trigger GPIO interrupt: {e}.")
}
Error::GpioTriggerKeyFailure(key) => {
write!(f, "Invalid GPIO Input key triggerd: {key}.")
write!(f, "Invalid GPIO Input key triggered: {key}.")
}
}
}

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@ -7,13 +7,13 @@ The target audience of this document is both:
## Control
The number of `-v` parameters passed to the `cloud-hypervisor` binary will determine the log level. Currenly the default is log messages up to `WARN:` (`warn!`) are included by default. The `--log-file` allows the log to be sent to a location other than `stderr`.
The number of `-v` parameters passed to the `cloud-hypervisor` binary will determine the log level. Currently the default is log messages up to `WARN:` (`warn!`) are included by default. The `--log-file` allows the log to be sent to a location other than `stderr`.
## Levels
### `error!()`
For immediate, unrecoverable errors where it does not make sense for the execution to continue as the behaviour of the VM is considerablely impacted.
For immediate, unrecoverable errors where it does not make sense for the execution to continue as the behaviour of the VM is considerably impacted.
Cloud Hypervisor should exit shortly after reporting this error (with a non-zero exit code). Generally this should be used during initial construction of the VM state before the virtual CPUs have begun running code.
@ -23,7 +23,7 @@ Users should react to this error by checking their initial VM configuration.
### `warn!()`
A serious problem has occured but the execution of the VM can continue although some functionality might be impacted.
A serious problem has occurred but the execution of the VM can continue although some functionality might be impacted.
A typical example of where this level of message should be generated is during an API call request that cannot be fulfilled.

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@ -222,7 +222,7 @@ struct MemoryZoneConfig {
--memory-zone <memory-zone> User defined memory zone parameters "size=<guest_memory_region_size>,file=<backing_file>,shared=on|off,hugepages=on|off,hugepage_size=<hugepage_size>,host_numa_node=<node_id>,id=<zone_identifier>,hotplug_size=<hotpluggable_memory_size>,hotplugged_size=<hotplugged_memory_size>,prefault=on|off"
```
This parameter expects one or more occurences, allowing for a list of memory
This parameter expects one or more occurrences, allowing for a list of memory
zones to be defined. It must be used with `--memory size=0`, clearly indicating
that the memory will be described through advanced parameters.

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@ -1,6 +1,6 @@
# Tracing
Cloud Hypervisor has a basic tracing infrastucture, particularly focussed on
Cloud Hypervisor has a basic tracing infrastructure, particularly focussed on
the tracing of the initial VM setup.
## Usage

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@ -135,7 +135,7 @@ This section illustrates the Windows specific aspects of the VM network configur
### Basic Networking
As the simplest option, using `--net tap=` in the Cloud Hypervisor command line will create a `vmtapX` device on the host with the default IPv4 adress `192.168.249.1`. After SAC becomes available, the guest configuration can be set with
As the simplest option, using `--net tap=` in the Cloud Hypervisor command line will create a `vmtapX` device on the host with the default IPv4 address `192.168.249.1`. After SAC becomes available, the guest configuration can be set with
<pre>
SAC>i 10 192.168.249.2 255.255.255.0 192.168.249.1
@ -203,13 +203,13 @@ The Windows guest debugging process relies heavily on QEMU and [socat](http://ww
The connection between both guests happens over TCP, whereby on the guest side it is automatically translated to a COM port. Because the VMs are connected through TCP, the debugging infrastructure can be distributed over the network. The serial port, while slowly transferring data, is common enough to support a wide range of cases and tools.
In this excercise, [WinDbg](https://docs.microsoft.com/en-us/windows-hardware/drivers/debugger/) is used. Any other debugger of choice with the ability to use serial connection can be used instead.
In this exercise, [WinDbg](https://docs.microsoft.com/en-us/windows-hardware/drivers/debugger/) is used. Any other debugger of choice with the ability to use serial connection can be used instead.
### Debugger and Debuggee
#### WinDbg VM
For simplicity, the debugger VM is supposed to be only running under QEMU. It will require VGA and doesn't neccessarily depend on UEFI. As an OS, it can carry any supported Windows OS where the debugger of choice can be installed. The simplest way is to follow the image preparation instructions from the previous chapter, but avoid using the OVMF firmware. It is also not required to use VirtIO drivers, whereby it might be useful in some case. Though, while creating the image file for the debugger VM, be sure to choose a sufficient disk size that counts in the need to save the corresponding debug symbols and sources.
For simplicity, the debugger VM is supposed to be only running under QEMU. It will require VGA and doesn't necessarily depend on UEFI. As an OS, it can carry any supported Windows OS where the debugger of choice can be installed. The simplest way is to follow the image preparation instructions from the previous chapter, but avoid using the OVMF firmware. It is also not required to use VirtIO drivers, whereby it might be useful in some case. Though, while creating the image file for the debugger VM, be sure to choose a sufficient disk size that counts in the need to save the corresponding debug symbols and sources.
To create the debugger Windows VM, the following command can be used:
@ -244,7 +244,7 @@ This will configure the debugging to be enabled and instruct to use the serial p
bcdedit /dbgsettings serial debugport:1 baudrate:115200
```
##### Turn On Kernel Debuging
##### Turn On Kernel Debugging
```cmd
bcdedit /debug on

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@ -24,7 +24,7 @@ const QUEUE_NUM: usize = 3;
const QUEUE_SIZE: u16 = 64;
// Descriptor table alignment
const DESC_TABLE_ALIGN_SIZE: u64 = 16;
// Avalable ring alignment
// Available ring alignment
const AVAIL_RING_ALIGN_SIZE: u64 = 2;
// Used ring alignment
const USED_RING_ALIGN_SIZE: u64 = 4;

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@ -30,7 +30,7 @@ const IOVA_SPACE_SIZE: usize = (0xfeef_ffff - 0xfee0_0000) + 1;
const QUEUE_SIZE: u16 = 256;
// Descriptor table alignment
const DESC_TABLE_ALIGN_SIZE: u64 = 16;
// Avalable ring alignment
// Available ring alignment
const AVAIL_RING_ALIGN_SIZE: u64 = 2;
// Used ring alignment
const USED_RING_ALIGN_SIZE: u64 = 4;

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@ -33,7 +33,7 @@ const VIRTIO_MEM_REGION_ADDRESS: u64 = 0;
const QUEUE_SIZE: u16 = 64;
// Descriptor table alignment
const DESC_TABLE_ALIGN_SIZE: u64 = 16;
// Avalable ring alignment
// Available ring alignment
const AVAIL_RING_ALIGN_SIZE: u64 = 2;
// Used ring alignment
const USED_RING_ALIGN_SIZE: u64 = 4;

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@ -28,7 +28,7 @@ const MEM_SIZE: usize = 1 * 1024 * 1024;
const QUEUE_SIZE: u16 = 256;
// Descriptor table alignment
const DESC_TABLE_ALIGN_SIZE: u64 = 16;
// Avalable ring alignment
// Available ring alignment
const AVAIL_RING_ALIGN_SIZE: u64 = 2;
// Used ring alignment
const USED_RING_ALIGN_SIZE: u64 = 4;

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@ -18,7 +18,7 @@ use crate::arch::x86::Exception;
// CMP affects OF, SF, ZF, AF, PF and CF
const FLAGS_MASK: u64 = CF | PF | AF | ZF | SF | OF;
// TODO: Switch to inline asm when that's stable. Executing CMP (or any arthimetic instructions)
// TODO: Switch to inline asm when that's stable. Executing CMP (or any arithmetic instructions)
// natively and extracting RFLAGS will be much faster and make the code simpler.
fn calc_rflags_cpazso(op0: u64, op1: u64, op_size: usize) -> u64 {
let op_bits = op_size * 8;

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@ -242,7 +242,7 @@ pub enum HypervisorCpuError {
UnknownTdxVmCall,
#[cfg(target_arch = "aarch64")]
///
/// Failed to intialize PMU
/// Failed to initialize PMU
///
#[error("Failed to initialize PMU")]
InitializePmu,

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@ -1205,7 +1205,7 @@ impl cpu::Vcpu for KvmVcpu {
off += std::mem::size_of::<u64>();
}
// Now moving on to floting point registers which are stored in the user_fpsimd_state in the kernel:
// Now moving on to floating point registers which are stored in the user_fpsimd_state in the kernel:
// https://elixir.free-electrons.com/linux/v4.9.62/source/arch/arm64/include/uapi/asm/kvm.h#L53
let mut off = offset_of!(kvm_regs, fp_regs) + offset_of!(user_fpsimd_state, vregs);
for i in 0..32 {

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@ -140,7 +140,7 @@ pub enum MpState {
#[cfg(feature = "kvm")]
Kvm(kvm_bindings::kvm_mp_state),
#[cfg(all(feature = "mshv", target_arch = "x86_64"))]
Mshv, /* MSHV does not supprt MpState yet */
Mshv, /* MSHV does not support MpState yet */
}
#[derive(Debug, Clone, Copy)]
@ -164,7 +164,7 @@ pub enum ClockData {
#[cfg(feature = "kvm")]
Kvm(kvm_bindings::kvm_clock_data),
#[cfg(feature = "mshv")]
Mshv, /* MSHV does not supprt ClockData yet */
Mshv, /* MSHV does not support ClockData yet */
}
#[cfg(target_arch = "x86_64")]

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@ -325,7 +325,7 @@ pub trait Vm: Send + Sync + Any {
/// Get dirty pages bitmap
fn get_dirty_log(&self, slot: u32, base_gpa: u64, memory_size: u64) -> Result<Vec<u64>>;
#[cfg(feature = "tdx")]
/// Initalize TDX on this VM
/// Initialize TDX on this VM
fn tdx_init(&self, _cpuid: &[CpuIdEntry], _max_vcpus: u32) -> Result<()> {
unimplemented!()
}
@ -335,7 +335,7 @@ pub trait Vm: Send + Sync + Any {
unimplemented!()
}
#[cfg(feature = "tdx")]
/// Initalize a TDX memory region for this VM
/// Initialize a TDX memory region for this VM
fn tdx_init_memory_region(
&self,
_host_address: u64,

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@ -203,7 +203,7 @@ impl Tap {
let mut ifreq: net_gen::ifreq = Default::default();
// Get current config including name
// SAFETY: IOCTL with correct arugments
// SAFETY: IOCTL with correct arguments
unsafe { Self::ioctl_with_mut_ref(&tap_file, net_gen::TUNGETIFF(), &mut ifreq)? };
// SAFETY: We only access one field of the ifru union

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@ -265,10 +265,10 @@ pub enum PciExpressCapabilityId {
VendorSpecificExtendedCapability = 0x000b,
ConfigurationAccessCorrelation = 0x000c,
AccessControlServices = 0x000d,
AlternativeRoutingIdentificationIntepretation = 0x000e,
AlternativeRoutingIdentificationInterpretation = 0x000e,
AddressTranslationServices = 0x000f,
SingleRootIoVirtualization = 0x0010,
DeprecatedMultiRootIoVirtualzation = 0x0011,
DeprecatedMultiRootIoVirtualization = 0x0011,
Multicast = 0x0012,
PageRequestInterface = 0x0013,
ReservedForAmd = 0x0014,
@ -279,7 +279,7 @@ pub enum PciExpressCapabilityId {
SecondaryPciExpress = 0x0019,
ProtocolMultiplexing = 0x001a,
ProcessAddressSpaceId = 0x001b,
LnRequestor = 0x001c,
LnRequester = 0x001c,
DownstreamPortContainment = 0x001d,
L1PmSubstates = 0x001e,
PrecisionTimeMeasurement = 0x001f,
@ -319,10 +319,10 @@ impl From<u16> for PciExpressCapabilityId {
0x000b => PciExpressCapabilityId::VendorSpecificExtendedCapability,
0x000c => PciExpressCapabilityId::ConfigurationAccessCorrelation,
0x000d => PciExpressCapabilityId::AccessControlServices,
0x000e => PciExpressCapabilityId::AlternativeRoutingIdentificationIntepretation,
0x000e => PciExpressCapabilityId::AlternativeRoutingIdentificationInterpretation,
0x000f => PciExpressCapabilityId::AddressTranslationServices,
0x0010 => PciExpressCapabilityId::SingleRootIoVirtualization,
0x0011 => PciExpressCapabilityId::DeprecatedMultiRootIoVirtualzation,
0x0011 => PciExpressCapabilityId::DeprecatedMultiRootIoVirtualization,
0x0012 => PciExpressCapabilityId::Multicast,
0x0013 => PciExpressCapabilityId::PageRequestInterface,
0x0014 => PciExpressCapabilityId::ReservedForAmd,
@ -333,7 +333,7 @@ impl From<u16> for PciExpressCapabilityId {
0x0019 => PciExpressCapabilityId::SecondaryPciExpress,
0x001a => PciExpressCapabilityId::ProtocolMultiplexing,
0x001b => PciExpressCapabilityId::ProcessAddressSpaceId,
0x001c => PciExpressCapabilityId::LnRequestor,
0x001c => PciExpressCapabilityId::LnRequester,
0x001d => PciExpressCapabilityId::DownstreamPortContainment,
0x001e => PciExpressCapabilityId::L1PmSubstates,
0x001f => PciExpressCapabilityId::PrecisionTimeMeasurement,

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@ -502,8 +502,8 @@ impl VfioCommon {
Ok(vfio_common)
}
/// In case msix table offset is not page size aligned, we need do some fixup to achive it.
/// Becuse we don't want the MMIO RW region and trap region overlap each other.
/// In case msix table offset is not page size aligned, we need do some fixup to achieve it.
/// Because we don't want the MMIO RW region and trap region overlap each other.
fn fixup_msix_region(&mut self, bar_id: u32, region_size: u64) -> u64 {
if let Some(msix) = self.interrupt.msix.as_mut() {
let msix_cap = &mut msix.cap;
@ -911,7 +911,7 @@ impl VfioCommon {
let cap_next: u16 = ((ext_cap_hdr >> 20) & 0xfff) as u16;
match PciExpressCapabilityId::from(cap_id) {
PciExpressCapabilityId::AlternativeRoutingIdentificationIntepretation
PciExpressCapabilityId::AlternativeRoutingIdentificationInterpretation
| PciExpressCapabilityId::ResizeableBar
| PciExpressCapabilityId::SingleRootIoVirtualization => {
let reg_idx = (current_offset / 4) as usize;
@ -1411,7 +1411,7 @@ impl VfioPciDevice {
// around them, leading to a list of sparse areas.
// We want to make sure we will still trap MMIO accesses
// to these MSI-X specific ranges. If these region don't align
// with pagesize, we can achive it by enlarging its range.
// with pagesize, we can achieve it by enlarging its range.
//
// Using a BtreeMap as the list provided through the iterator is sorted
// by key. This ensures proper split of the whole region.

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@ -860,7 +860,7 @@ pub(crate) mod tests {
assert!(!l.consume(100, TokenType::Bytes));
// after waiting out the full duration, rate limiter should be
// availale again
// available again
thread::sleep(Duration::from_millis(200));
assert!(l.event_handler().is_ok());
assert!(!l.is_blocked());

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@ -873,7 +873,7 @@ binary with the detection of the hypervisor to use made at runtime.
### Notable Bug Fixes
* The prefetchable flag is preserved on BARs for VFIO devices (#4353, #4454)
* PCI Express capabilties for functionality we do not support are now filtered
* PCI Express capabilities for functionality we do not support are now filtered
out (#4456)
* GDB breakpoint support is more reliable (#4354, #4363)
* `SIGINT` and `SIGTERM` signals are now handled before the VM has booted
@ -1228,10 +1228,10 @@ is now 5.15. (#3530)
### Notable Bug fixes
* Multiple fixes were made to the OpenAPI YAML file to match the implementaion (#3555,#3562)
* Multiple fixes were made to the OpenAPI YAML file to match the implementation (#3555,#3562)
* Avoid live migration deadlock when triggered during the kernel boot (#3585)
* Support live migration within firmware (#3586)
* Validate the `virtio-net` desciptor chain (#3548)
* Validate the `virtio-net` descriptor chain (#3548)
* `direct=on` (`O_DIRECT`) can now be used with a guest that makes unaligned accesses (e.g. firmware) (#3587)
### Contributors

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@ -1844,7 +1844,7 @@ fn test_memory_mergeable(mergeable: bool) {
"mergeable=off"
};
// We are assuming the rest of the system in our CI is not using mergeable memeory
// We are assuming the rest of the system in our CI is not using mergeable memory
let ksm_ps_init = get_ksm_pages_shared();
assert!(ksm_ps_init == 0);
@ -6175,7 +6175,7 @@ mod common_parallel {
guest.ssh_command("screen -dmS reboot sh -c \"sleep 5; echo s | tee /proc/sysrq-trigger; echo c | sudo tee /proc/sysrq-trigger\"").unwrap();
// Allow some time for the watchdog to trigger (max 30s) and reboot to happen
guest.wait_vm_boot(Some(50)).unwrap();
// Check a reboot is triggerred by the watchdog
// Check a reboot is triggered by the watchdog
expected_reboot_count += 1;
assert_eq!(get_reboot_count(&guest), expected_reboot_count);
@ -8788,13 +8788,13 @@ mod live_migration {
);
});
// Check and report any errors occured during the live-migration
// Check and report any errors occurred during the live-migration
if r.is_err() {
print_and_panic(
src_child,
dest_child,
None,
"Error occured during live-migration",
"Error occurred during live-migration",
);
}
@ -8962,13 +8962,13 @@ mod live_migration {
);
});
// Check and report any errors occured during the live-migration
// Check and report any errors occurred during the live-migration
if r.is_err() {
print_and_panic(
src_child,
dest_child,
None,
"Error occured during live-migration",
"Error occurred during live-migration",
);
}
@ -9188,13 +9188,13 @@ mod live_migration {
);
});
// Check and report any errors occured during the live-migration
// Check and report any errors occurred during the live-migration
if r.is_err() {
print_and_panic(
src_child,
dest_child,
None,
"Error occured during live-migration",
"Error occurred during live-migration",
);
}
@ -9407,13 +9407,13 @@ mod live_migration {
);
});
// Check and report any errors occured during the live-migration
// Check and report any errors occurred during the live-migration
if r.is_err() {
print_and_panic(
src_child,
dest_child,
None,
"Error occured during live-migration",
"Error occurred during live-migration",
);
}
@ -9448,7 +9448,7 @@ mod live_migration {
guest.ssh_command("screen -dmS reboot sh -c \"sleep 5; echo s | tee /proc/sysrq-trigger; echo c | sudo tee /proc/sysrq-trigger\"").unwrap();
// Allow some time for the watchdog to trigger (max 30s) and reboot to happen
guest.wait_vm_boot(Some(50)).unwrap();
// Check a reboot is triggerred by the watchdog
// Check a reboot is triggered by the watchdog
expected_reboot_count += 1;
assert_eq!(get_reboot_count(&guest), expected_reboot_count);
@ -9517,13 +9517,13 @@ mod live_migration {
);
});
// Check and report any errors occured during the live-migration
// Check and report any errors occurred during the live-migration
if r.is_err() {
print_and_panic(
src_child,
dest_child,
Some(ovs_child),
"Error occured during live-migration",
"Error occurred during live-migration",
);
}

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@ -154,7 +154,7 @@ impl Ptm for PtmCap {
}
}
/* GET_TPMESTABLISHED Reponse */
/* GET_TPMESTABLISHED Response */
#[derive(Debug)]
pub struct PtmEstResp {
pub bit: u8,

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@ -80,7 +80,7 @@ impl Tracer {
if let Some(depth) = self.thread_depths.get_mut(thread_name) {
depth.fetch_sub(1, Ordering::SeqCst);
} else {
panic!("Unmatched decreas for thread: {thread_name}");
panic!("Unmatched decrease for thread: {thread_name}");
}
}

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@ -12,7 +12,7 @@
mod address;
mod gsi;
/// page size related utility funtions
/// page size related utility functions
pub mod page_size;
mod system;

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@ -52,7 +52,7 @@ pub struct SystemAllocator {
}
impl SystemAllocator {
/// Creates a new `SystemAllocator` for managing addresses and irq numvers.
/// Creates a new `SystemAllocator` for managing addresses and irq numbers.
/// Can return `None` if `base` + `size` overflows a u64
///
/// * `io_base` - (X86) The starting address of IO memory.

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@ -147,7 +147,7 @@ pub trait InterruptSourceGroup: Send + Sync {
/// * index: sub-index into the group.
/// * config: configuration data for the interrupt source.
/// * masked: if the interrupt is masked
/// * set_gsi: whehter update the GSI routing table.
/// * set_gsi: whether update the GSI routing table.
fn update(
&self,
index: InterruptIndex,

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@ -257,7 +257,7 @@ impl MemoryRangeTable {
length as usize / (std::mem::size_of::<MemoryRange>()),
Default::default,
);
// SAFETY: the slice is construted with the correct arguments
// SAFETY: the slice is constructed with the correct arguments
fd.read_exact(unsafe {
std::slice::from_raw_parts_mut(
data.as_ptr() as *mut MemoryRange as *mut u8,
@ -274,7 +274,7 @@ impl MemoryRangeTable {
}
pub fn write_to(&self, fd: &mut dyn Write) -> Result<(), MigratableError> {
// SAFETY: the slice is construted with the correct arguments
// SAFETY: the slice is constructed with the correct arguments
fd.write_all(unsafe {
std::slice::from_raw_parts(self.data.as_ptr() as *const u8, self.length() as usize)
})

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@ -511,7 +511,7 @@ fn create_iort_table(pci_segments: &[PciSegment]) -> Sdt {
const ACPI_IORT_NODE_ROOT_COMPLEX_OFFSET: usize = 72;
const ACPI_IORT_NODE_ROOT_COMPLEX_SIZE: usize = 60;
// The IORT table containes:
// The IORT table contains:
// - Header (size = 40)
// - 1 x ITS Group Node (size = 24)
// - N x Root Complex Node (N = number of pci segments, size = 60 x N)

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@ -148,7 +148,7 @@ pub enum ValidationError {
/// Missing firmware for TDX
#[cfg(feature = "tdx")]
TdxFirmwareMissing,
/// Insuffient vCPUs for queues
/// Insufficient vCPUs for queues
TooManyQueues,
/// Need shared memory for vfio-user
UserDevicesRequireSharedMemory,
@ -162,7 +162,7 @@ pub enum ValidationError {
BalloonLargerThanRam(u64, u64),
/// On a IOMMU segment but not behind IOMMU
OnIommuSegment(u16),
// On a IOMMU segment but IOMMU not suported
// On a IOMMU segment but IOMMU not supported
IommuNotSupportedOnSegment(u16),
// Identifier is not unique
IdentifierNotUnique(String),

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@ -627,7 +627,7 @@ impl CpuManager {
const XFEATURE_XTILEDATA: usize = 18;
const XFEATURE_XTILEDATA_MASK: usize = 1 << XFEATURE_XTILEDATA;
// SAFETY: the syscall is only modifing kernel internal
// SAFETY: the syscall is only modifying kernel internal
// data structures that the kernel is itself expected to safeguard.
let amx_tile = unsafe {
libc::syscall(
@ -1680,7 +1680,7 @@ impl CpuManager {
// Translation table base address
let mut descaddr: u64 = extract_bits_64_without_offset!(ttbr1_el1, 48);
// In the case of FEAT_LPA and FEAT_LPA2, the initial translation table
// addresss bits [48:51] comes from TTBR1_EL1 bits [2:5].
// address bits [48:51] comes from TTBR1_EL1 bits [2:5].
if pa_size == 52 {
descaddr |= extract_bits_64!(ttbr1_el1, 2, 4) << 48;
}
@ -2121,7 +2121,7 @@ impl Pausable for CpuManager {
}
// The vCPU thread will change its paused state before parking, wait here for each
// actived vCPU change their state to ensure they have parked.
// activated vCPU change their state to ensure they have parked.
for state in self.vcpu_states.iter() {
if state.active() {
while !state.paused.load(Ordering::SeqCst) {

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@ -511,7 +511,7 @@ pub fn create_pty() -> io::Result<(File, File, PathBuf)> {
// SAFETY: FFI call into libc, trivially safe
unsafe { libc::ioctl(main.as_raw_fd(), TIOCSPTLCK as _, &mut unlock) };
// SAFETY: FFI call into libc, trivally safe
// SAFETY: FFI call into libc, trivially safe
let sub_fd = unsafe {
libc::ioctl(
main.as_raw_fd(),
@ -4280,7 +4280,7 @@ impl DeviceManager {
// 1. Users will use direct kernel boot with device tree.
// 2. Users will use ACPI+UEFI boot.
// Trigger a GPIO pin 3 event to satisify use case 1.
// Trigger a GPIO pin 3 event to satisfy use case 1.
self.gpio_device
.as_ref()
.unwrap()
@ -4288,7 +4288,7 @@ impl DeviceManager {
.unwrap()
.trigger_key(3)
.map_err(DeviceManagerError::AArch64PowerButtonNotification)?;
// Trigger a GED power button event to satisify use case 2.
// Trigger a GED power button event to satisfy use case 2.
return self
.ged_notification_device
.as_ref()

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@ -1436,7 +1436,7 @@ impl MemoryManager {
region.as_ptr() as u64,
size
);
// SAFETY: FFI call with corect arguments
// SAFETY: FFI call with correct arguments
let ret = unsafe { libc::madvise(region.as_ptr() as _, size, libc::MADV_HUGEPAGE) };
if ret != 0 {
let e = io::Error::last_os_error();

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@ -604,9 +604,9 @@ pub struct VmConfig {
pub gdb: bool,
pub platform: Option<PlatformConfig>,
pub tpm: Option<TpmConfig>,
// Preseved FDs are the ones that share the same life-time as its holding
// Preserved FDs are the ones that share the same life-time as its holding
// VmConfig instance, such as FDs for creating TAP devices.
// Perserved FDs will stay open as long as the holding VmConfig instance is
// Preserved FDs will stay open as long as the holding VmConfig instance is
// valid, and will be closed when the holding VmConfig instance is destroyed.
#[serde(skip)]
pub preserved_fds: Option<Vec<i32>>,