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arch: Address Rust 1.51.0 clippy issue (upper_case_acronyms)

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error: name `RSDPPastRamEnd` contains a capitalized acronym
  --> arch/src/lib.rs:59:5
   |
59 |     RSDPPastRamEnd,
   |     ^^^^^^^^^^^^^^ help: consider making the acronym lowercase, except the initial letter: `RsdpPastRamEnd`
   |
   = note: `-D clippy::upper-case-acronyms` implied by `-D warnings`
   = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#upper_case_acronyms

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
This commit is contained in:
Rob Bradford 2021-03-25 17:01:21 +00:00
parent 80e48b545d
commit 85ad72490f
4 changed files with 29 additions and 29 deletions
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4
arch/src/aarch64/mod.rs
View File

@ -37,7 +37,7 @@ pub enum Error {
InitramfsAddress,
/// Error configuring the general purpose registers
REGSConfiguration(regs::Error),
RegsConfiguration(regs::Error),
/// Error configuring the MPIDR register
VcpuRegMPIDR(hypervisor::HypervisorCpuError),
@ -71,7 +71,7 @@ pub fn configure_vcpu(
kernel_entry_point.entry_addr.raw_value(),
&vm_memory.memory(),
)
.map_err(Error::REGSConfiguration)?;
.map_err(Error::RegsConfiguration)?;
}
let mpidr = fd.read_mpidr().map_err(Error::VcpuRegMPIDR)?;

2
arch/src/lib.rs
View File

@ -56,7 +56,7 @@ pub enum Error {
/// Error writing module entry to guest memory.
ModlistSetup(vm_memory::GuestMemoryError),
/// RSDP Beyond Guest Memory
RSDPPastRamEnd,
RsdpPastRamEnd,
}
/// Type for returning public functions outcome.

20
arch/src/x86_64/mod.rs
View File

@ -147,16 +147,16 @@ pub enum Error {
MpTableSetup(mptable::Error),
/// Error configuring the general purpose registers
REGSConfiguration(regs::Error),
RegsConfiguration(regs::Error),
/// Error configuring the special registers
SREGSConfiguration(regs::Error),
SregsConfiguration(regs::Error),
/// Error configuring the floating point related registers
FPUConfiguration(regs::Error),
FpuConfiguration(regs::Error),
/// Error configuring the MSR registers
MSRSConfiguration(regs::Error),
MsrsConfiguration(regs::Error),
/// Failed to set supported CPUs.
SetSupportedCpusFailed(anyhow::Error),
@ -183,7 +183,7 @@ impl From<Error> for super::Error {
}
}
#[allow(dead_code)]
#[allow(dead_code, clippy::upper_case_acronyms)]
#[derive(Copy, Clone)]
pub enum CpuidReg {
EAX,
@ -348,7 +348,7 @@ pub fn configure_vcpu(
fd.enable_hyperv_synic().unwrap();
}
regs::setup_msrs(fd).map_err(Error::MSRSConfiguration)?;
regs::setup_msrs(fd).map_err(Error::MsrsConfiguration)?;
if let Some(kernel_entry_point) = kernel_entry_point {
// Safe to unwrap because this method is called after the VM is configured
regs::setup_regs(
@ -358,10 +358,10 @@ pub fn configure_vcpu(
layout::ZERO_PAGE_START.raw_value(),
kernel_entry_point.protocol,
)
.map_err(Error::REGSConfiguration)?;
regs::setup_fpu(fd).map_err(Error::FPUConfiguration)?;
.map_err(Error::RegsConfiguration)?;
regs::setup_fpu(fd).map_err(Error::FpuConfiguration)?;
regs::setup_sregs(&vm_memory.memory(), fd, kernel_entry_point.protocol)
.map_err(Error::SREGSConfiguration)?;
.map_err(Error::SregsConfiguration)?;
}
interrupts::set_lint(fd).map_err(|e| Error::LocalIntConfiguration(e.into()))?;
Ok(())
@ -444,7 +444,7 @@ pub fn configure_system(
// Check that the RAM is not smaller than the RSDP start address
if let Some(rsdp_addr) = rsdp_addr {
if rsdp_addr.0 > guest_mem.last_addr().0 {
return Err(super::Error::RSDPPastRamEnd);
return Err(super::Error::RsdpPastRamEnd);
}
}

32
arch/src/x86_64/regs.rs
View File

@ -25,25 +25,25 @@ pub enum Error {
/// Failed to set base registers for this CPU.
SetBaseRegisters(hypervisor::HypervisorCpuError),
/// Failed to configure the FPU.
SetFPURegisters(hypervisor::HypervisorCpuError),
SetFpuRegisters(hypervisor::HypervisorCpuError),
/// Setting up MSRs failed.
SetModelSpecificRegisters(hypervisor::HypervisorCpuError),
/// Failed to set SREGs for this CPU.
SetStatusRegisters(hypervisor::HypervisorCpuError),
/// Checking the GDT address failed.
CheckGDTAddr,
CheckGdtAddr,
/// Writing the GDT to RAM failed.
WriteGDT(GuestMemoryError),
WriteGdt(GuestMemoryError),
/// Writing the IDT to RAM failed.
WriteIDT(GuestMemoryError),
WriteIdt(GuestMemoryError),
/// Writing PDPTE to RAM failed.
WritePDPTEAddress(GuestMemoryError),
WritePdpteAddress(GuestMemoryError),
/// Writing PDE to RAM failed.
WritePDEAddress(GuestMemoryError),
WritePdeAddress(GuestMemoryError),
/// Writing PML4 to RAM failed.
WritePML4Address(GuestMemoryError),
WritePml4Address(GuestMemoryError),
/// Writing PML5 to RAM failed.
WritePML5Address(GuestMemoryError),
WritePml5Address(GuestMemoryError),
}
pub type Result<T> = result::Result<T, Error>;
@ -60,7 +60,7 @@ pub fn setup_fpu(vcpu: &Arc<dyn hypervisor::Vcpu>) -> Result<()> {
..Default::default()
};
vcpu.set_fpu(&fpu).map_err(Error::SetFPURegisters)
vcpu.set_fpu(&fpu).map_err(Error::SetFpuRegisters)
}
/// Configure Model Specific Registers (MSRs) for a given CPU.
@ -140,8 +140,8 @@ fn write_gdt_table(table: &[u64], guest_mem: &GuestMemoryMmap) -> Result<()> {
for (index, entry) in table.iter().enumerate() {
let addr = guest_mem
.checked_offset(boot_gdt_addr, index * mem::size_of::<u64>())
.ok_or(Error::CheckGDTAddr)?;
guest_mem.write_obj(*entry, addr).map_err(Error::WriteGDT)?;
.ok_or(Error::CheckGdtAddr)?;
guest_mem.write_obj(*entry, addr).map_err(Error::WriteGdt)?;
}
Ok(())
}
@ -150,7 +150,7 @@ fn write_idt_value(val: u64, guest_mem: &GuestMemoryMmap) -> Result<()> {
let boot_idt_addr = BOOT_IDT_START;
guest_mem
.write_obj(val, boot_idt_addr)
.map_err(Error::WriteIDT)
.map_err(Error::WriteIdt)
}
pub fn configure_segments_and_sregs(
@ -220,7 +220,7 @@ pub fn setup_page_tables(mem: &GuestMemoryMmap, sregs: &mut SpecialRegisters) ->
if unsafe { std::arch::x86_64::__cpuid(7).ecx } & (1 << 16) != 0 {
// Entry covering VA [0..256TB)
mem.write_obj(PML4_START.raw_value() | 0x03, PML5_START)
.map_err(Error::WritePML5Address)?;
.map_err(Error::WritePml5Address)?;
sregs.cr3 = PML5_START.raw_value();
sregs.cr4 |= CR4_LA57;
@ -230,17 +230,17 @@ pub fn setup_page_tables(mem: &GuestMemoryMmap, sregs: &mut SpecialRegisters) ->
// Entry covering VA [0..512GB)
mem.write_obj(PDPTE_START.raw_value() | 0x03, PML4_START)
.map_err(Error::WritePML4Address)?;
.map_err(Error::WritePml4Address)?;
// Entry covering VA [0..1GB)
mem.write_obj(PDE_START.raw_value() | 0x03, PDPTE_START)
.map_err(Error::WritePDPTEAddress)?;
.map_err(Error::WritePdpteAddress)?;
// 512 2MB entries together covering VA [0..1GB). Note we are assuming
// CPU supports 2MB pages (/proc/cpuinfo has 'pse'). All modern CPUs do.
for i in 0..512 {
mem.write_obj((i << 21) + 0x83u64, PDE_START.unchecked_add(i * 8))
.map_err(Error::WritePDEAddress)?;
.map_err(Error::WritePdeAddress)?;
}
sregs.cr4 |= CR4_PAE;