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https://github.com/cloud-hypervisor/cloud-hypervisor.git
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msix: Add SystemAllocator to MsixConfig
The point here is to let MsixConfig take care of the GSI allocation, which means the SystemAllocator must be passed from the vmm crate all the way down to the pci crate. Once this is done, the GSI allocation and irq_fd creation is performed by MsixConfig directly. Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
This commit is contained in:
parent
f77d2c2d16
commit
86c760a0d9
@ -9,8 +9,9 @@ extern crate vm_memory;
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use std::sync::Arc;
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use std::sync::Arc;
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use crate::device::InterruptParameters;
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use crate::device::InterruptParameters;
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use crate::{InterruptDelivery, PciCapability, PciCapabilityID};
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use crate::{InterruptDelivery, InterruptRoute, PciCapability, PciCapabilityID};
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use byteorder::{ByteOrder, LittleEndian};
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use byteorder::{ByteOrder, LittleEndian};
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use vm_allocator::SystemAllocator;
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use vm_memory::ByteValued;
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use vm_memory::ByteValued;
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const MAX_MSIX_VECTORS_PER_DEVICE: u16 = 2048;
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const MAX_MSIX_VECTORS_PER_DEVICE: u16 = 2048;
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@ -51,13 +52,14 @@ impl Default for MsixTableEntry {
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pub struct MsixConfig {
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pub struct MsixConfig {
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pub table_entries: Vec<MsixTableEntry>,
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pub table_entries: Vec<MsixTableEntry>,
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pub pba_entries: Vec<u64>,
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pub pba_entries: Vec<u64>,
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pub irq_routes: Vec<InterruptRoute>,
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interrupt_cb: Option<Arc<InterruptDelivery>>,
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interrupt_cb: Option<Arc<InterruptDelivery>>,
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masked: bool,
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masked: bool,
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enabled: bool,
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enabled: bool,
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}
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}
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impl MsixConfig {
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impl MsixConfig {
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pub fn new(msix_vectors: u16) -> Self {
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pub fn new(msix_vectors: u16, allocator: &mut SystemAllocator) -> Self {
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assert!(msix_vectors <= MAX_MSIX_VECTORS_PER_DEVICE);
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assert!(msix_vectors <= MAX_MSIX_VECTORS_PER_DEVICE);
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let mut table_entries: Vec<MsixTableEntry> = Vec::new();
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let mut table_entries: Vec<MsixTableEntry> = Vec::new();
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@ -66,9 +68,15 @@ impl MsixConfig {
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let num_pba_entries: usize = ((msix_vectors as usize) / BITS_PER_PBA_ENTRY) + 1;
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let num_pba_entries: usize = ((msix_vectors as usize) / BITS_PER_PBA_ENTRY) + 1;
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pba_entries.resize_with(num_pba_entries, Default::default);
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pba_entries.resize_with(num_pba_entries, Default::default);
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let mut irq_routes: Vec<InterruptRoute> = Vec::new();
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for _ in 0..msix_vectors {
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irq_routes.push(InterruptRoute::new(allocator).unwrap());
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}
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MsixConfig {
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MsixConfig {
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table_entries,
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table_entries,
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pba_entries,
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pba_entries,
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irq_routes,
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interrupt_cb: None,
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interrupt_cb: None,
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masked: false,
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masked: false,
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enabled: false,
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enabled: false,
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@ -340,7 +340,7 @@ impl VfioPciDevice {
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gsi_msi_routes,
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gsi_msi_routes,
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};
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};
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vfio_pci_device.parse_capabilities();
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vfio_pci_device.parse_capabilities(allocator);
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// Allocate temporary interrupt routes for now.
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// Allocate temporary interrupt routes for now.
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// The MSI vectors will be filled when the guest driver programs the device.
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// The MSI vectors will be filled when the guest driver programs the device.
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@ -394,7 +394,7 @@ impl VfioPciDevice {
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.map_err(VfioPciError::SetGsiRouting)
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.map_err(VfioPciError::SetGsiRouting)
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}
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}
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fn parse_msix_capabilities(&mut self, cap: u8) {
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fn parse_msix_capabilities(&mut self, cap: u8, allocator: &mut SystemAllocator) {
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let msg_ctl = self
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let msg_ctl = self
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.vfio_pci_configuration
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.vfio_pci_configuration
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.read_config_word((cap + 2).into());
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.read_config_word((cap + 2).into());
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@ -412,7 +412,7 @@ impl VfioPciDevice {
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table,
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table,
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pba,
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pba,
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};
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};
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let msix_config = MsixConfig::new(msix_cap.table_size());
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let msix_config = MsixConfig::new(msix_cap.table_size(), allocator);
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self.interrupt.msix = Some(VfioMsix {
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self.interrupt.msix = Some(VfioMsix {
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bar: msix_config,
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bar: msix_config,
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@ -435,7 +435,7 @@ impl VfioPciDevice {
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});
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});
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}
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}
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fn parse_capabilities(&mut self) {
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fn parse_capabilities(&mut self, allocator: &mut SystemAllocator) {
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let mut cap_next = self
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let mut cap_next = self
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.vfio_pci_configuration
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.vfio_pci_configuration
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.read_config_byte(PCI_CONFIG_CAPABILITY_OFFSET);
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.read_config_byte(PCI_CONFIG_CAPABILITY_OFFSET);
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@ -450,7 +450,7 @@ impl VfioPciDevice {
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self.parse_msi_capabilities(cap_next);
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self.parse_msi_capabilities(cap_next);
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}
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}
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PciCapabilityID::MSIX => {
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PciCapabilityID::MSIX => {
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self.parse_msix_capabilities(cap_next);
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self.parse_msix_capabilities(cap_next, allocator);
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}
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}
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_ => {}
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_ => {}
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};
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};
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@ -256,6 +256,7 @@ impl VirtioPciDevice {
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device: Arc<Mutex<dyn VirtioDevice>>,
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device: Arc<Mutex<dyn VirtioDevice>>,
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msix_num: u16,
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msix_num: u16,
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iommu_mapping_cb: Option<Arc<VirtioIommuRemapping>>,
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iommu_mapping_cb: Option<Arc<VirtioIommuRemapping>>,
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allocator: &mut SystemAllocator,
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) -> Result<Self> {
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) -> Result<Self> {
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let device_clone = device.clone();
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let device_clone = device.clone();
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let locked_device = device_clone.lock().unwrap();
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let locked_device = device_clone.lock().unwrap();
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@ -276,7 +277,7 @@ impl VirtioPciDevice {
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let pci_device_id = VIRTIO_PCI_DEVICE_ID_BASE + locked_device.device_type() as u16;
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let pci_device_id = VIRTIO_PCI_DEVICE_ID_BASE + locked_device.device_type() as u16;
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let (msix_config, msix_config_clone) = if msix_num > 0 {
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let (msix_config, msix_config_clone) = if msix_num > 0 {
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let msix_config = Arc::new(Mutex::new(MsixConfig::new(msix_num)));
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let msix_config = Arc::new(Mutex::new(MsixConfig::new(msix_num, allocator)));
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let msix_config_clone = msix_config.clone();
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let msix_config_clone = msix_config.clone();
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(Some(msix_config), Some(msix_config_clone))
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(Some(msix_config), Some(msix_config_clone))
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} else {
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} else {
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@ -1465,12 +1465,17 @@ impl DeviceManager {
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None
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None
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};
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};
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let mut virtio_pci_device =
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VirtioPciDevice::new(memory.clone(), virtio_device, msix_num, iommu_mapping_cb)
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.map_err(DeviceManagerError::VirtioDevice)?;
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let mut allocator = address_manager.allocator.lock().unwrap();
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let mut allocator = address_manager.allocator.lock().unwrap();
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let mut virtio_pci_device = VirtioPciDevice::new(
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memory.clone(),
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virtio_device,
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msix_num,
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iommu_mapping_cb,
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&mut allocator,
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)
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.map_err(DeviceManagerError::VirtioDevice)?;
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let bars = virtio_pci_device
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let bars = virtio_pci_device
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.allocate_bars(&mut allocator)
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.allocate_bars(&mut allocator)
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.map_err(DeviceManagerError::AllocateBars)?;
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.map_err(DeviceManagerError::AllocateBars)?;
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