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aarch64, acpi: Change PCIe high space for EDK2

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EDK2 requires the beginning of PCIe high space above 4G address.
In CLH the space follows the RAM. If the RAM space is small, the PCIe
high space could fall bellow 4G.
Here we put it above 512G in FDT to workaround the EDK2 check only when
ACPI is enabled, because EDK2 collects PCIe information from FDT.
The address written in ACPI is not impacted.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>
This commit is contained in:
Michael Zhao 2021-05-26 07:56:10 +08:00 committed by Xin Wang
parent b8b5dccfd8
commit 88fda7c305
1 changed files with 24 additions and 8 deletions
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32
arch/src/aarch64/fdt.rs
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@ -413,7 +413,23 @@ fn create_pci_nodes(
// Add node for PCIe controller.
// See Documentation/devicetree/bindings/pci/host-generic-pci.txt in the kernel
// and https://elinux.org/Device_Tree_Usage.
let pci_device_base = pci_device_base + PCI_HIGH_BASE;
// EDK2 requires the PCIe high space above 4G address.
// The actual space in CLH follows the RAM. If the RAM space is small, the PCIe high space
// could fall bellow 4G.
// Here we put it above 512G in FDT to workaround the EDK2 check.
// But the address written in ACPI is not impacted.
let pci_device_base_64bit: u64 = if cfg!(feature = "acpi") {
pci_device_base + PCI_HIGH_BASE
} else {
pci_device_base
};
let pci_device_size_64bit: u64 = if cfg!(feature = "acpi") {
pci_device_size - PCI_HIGH_BASE
} else {
pci_device_size
};
let ranges = [
// io addresses
0x1000000,
@ -432,13 +448,13 @@ fn create_pci_nodes(
(MEM_32BIT_DEVICES_SIZE >> 32) as u32, // size
MEM_32BIT_DEVICES_SIZE as u32,
// device addresses
0x3000000, // (ss = 11: 64-bit memory space)
(pci_device_base >> 32) as u32, // PCI address
pci_device_base as u32,
(pci_device_base >> 32) as u32, // CPU address
pci_device_base as u32,
(pci_device_size >> 32) as u32, // size
pci_device_size as u32,
0x3000000, // (ss = 11: 64-bit memory space)
(pci_device_base_64bit >> 32) as u32, // PCI address
pci_device_base_64bit as u32,
(pci_device_base_64bit >> 32) as u32, // CPU address
pci_device_base_64bit as u32,
(pci_device_size_64bit >> 32) as u32, // size
pci_device_size_64bit as u32,
];
let bus_range = [0, 0]; // Only bus 0
let reg = [PCI_MMCONFIG_START.0, PCI_MMCONFIG_SIZE];