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aarch64, acpi: Change PCIe high space for EDK2
EDK2 requires the beginning of PCIe high space above 4G address. In CLH the space follows the RAM. If the RAM space is small, the PCIe high space could fall bellow 4G. Here we put it above 512G in FDT to workaround the EDK2 check only when ACPI is enabled, because EDK2 collects PCIe information from FDT. The address written in ACPI is not impacted. Signed-off-by: Michael Zhao <michael.zhao@arm.com>
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@ -413,7 +413,23 @@ fn create_pci_nodes(
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// Add node for PCIe controller.
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// Add node for PCIe controller.
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// See Documentation/devicetree/bindings/pci/host-generic-pci.txt in the kernel
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// See Documentation/devicetree/bindings/pci/host-generic-pci.txt in the kernel
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// and https://elinux.org/Device_Tree_Usage.
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// and https://elinux.org/Device_Tree_Usage.
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let pci_device_base = pci_device_base + PCI_HIGH_BASE;
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// EDK2 requires the PCIe high space above 4G address.
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// The actual space in CLH follows the RAM. If the RAM space is small, the PCIe high space
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// could fall bellow 4G.
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// Here we put it above 512G in FDT to workaround the EDK2 check.
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// But the address written in ACPI is not impacted.
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let pci_device_base_64bit: u64 = if cfg!(feature = "acpi") {
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pci_device_base + PCI_HIGH_BASE
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} else {
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pci_device_base
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};
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let pci_device_size_64bit: u64 = if cfg!(feature = "acpi") {
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pci_device_size - PCI_HIGH_BASE
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} else {
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pci_device_size
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};
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let ranges = [
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let ranges = [
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// io addresses
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// io addresses
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0x1000000,
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0x1000000,
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@ -433,12 +449,12 @@ fn create_pci_nodes(
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MEM_32BIT_DEVICES_SIZE as u32,
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MEM_32BIT_DEVICES_SIZE as u32,
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// device addresses
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// device addresses
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0x3000000, // (ss = 11: 64-bit memory space)
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0x3000000, // (ss = 11: 64-bit memory space)
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(pci_device_base >> 32) as u32, // PCI address
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(pci_device_base_64bit >> 32) as u32, // PCI address
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pci_device_base as u32,
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pci_device_base_64bit as u32,
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(pci_device_base >> 32) as u32, // CPU address
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(pci_device_base_64bit >> 32) as u32, // CPU address
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pci_device_base as u32,
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pci_device_base_64bit as u32,
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(pci_device_size >> 32) as u32, // size
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(pci_device_size_64bit >> 32) as u32, // size
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pci_device_size as u32,
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pci_device_size_64bit as u32,
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];
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];
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let bus_range = [0, 0]; // Only bus 0
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let bus_range = [0, 0]; // Only bus 0
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let reg = [PCI_MMCONFIG_START.0, PCI_MMCONFIG_SIZE];
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let reg = [PCI_MMCONFIG_START.0, PCI_MMCONFIG_SIZE];
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