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hypervisor: mshv: Reduce msrs visibility to x86_64

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Model Specific Registers (MSRs) are usually available on x86
architecture. So, let's reduce the visibility of MSRs to just x86
architecture.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
This commit is contained in:
Jinank Jain 2024-03-19 21:03:51 +05:30 committed by Rob Bradford
parent dd37f33a43
commit 89ff0627e6
1 changed files with 32 additions and 19 deletions
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51
hypervisor/src/mshv/mod.rs
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@ -290,27 +290,39 @@ impl hypervisor::Hypervisor for MshvHypervisor {
) )
.map_err(|e| hypervisor::HypervisorError::SetPartitionProperty(e.into()))?; .map_err(|e| hypervisor::HypervisorError::SetPartitionProperty(e.into()))?;
let msr_list = self.get_msr_list()?;
let num_msrs = msr_list.as_fam_struct_ref().nmsrs as usize;
let mut msrs: Vec<MsrEntry> = vec![
MsrEntry {
..Default::default()
};
num_msrs
];
let indices = msr_list.as_slice();
for (pos, index) in indices.iter().enumerate() {
msrs[pos].index = *index;
}
let vm_fd = Arc::new(fd); let vm_fd = Arc::new(fd);
Ok(Arc::new(MshvVm { #[cfg(target_arch = "x86_64")]
fd: vm_fd, {
msrs, let msr_list = self.get_msr_list()?;
dirty_log_slots: Arc::new(RwLock::new(HashMap::new())), let num_msrs = msr_list.as_fam_struct_ref().nmsrs as usize;
#[cfg(feature = "sev_snp")] let mut msrs: Vec<MsrEntry> = vec![
sev_snp_enabled: mshv_vm_type == VmType::Snp, MsrEntry {
})) ..Default::default()
};
num_msrs
];
let indices = msr_list.as_slice();
for (pos, index) in indices.iter().enumerate() {
msrs[pos].index = *index;
}
Ok(Arc::new(MshvVm {
fd: vm_fd,
msrs,
dirty_log_slots: Arc::new(RwLock::new(HashMap::new())),
#[cfg(feature = "sev_snp")]
sev_snp_enabled: mshv_vm_type == VmType::Snp,
}))
}
#[cfg(target_arch = "aarch64")]
{
Ok(Arc::new(MshvVm {
fd: vm_fd,
dirty_log_slots: Arc::new(RwLock::new(HashMap::new())),
}))
}
} }
/// Create a mshv vm object and return the object as Vm trait object /// Create a mshv vm object and return the object as Vm trait object
@ -1538,6 +1550,7 @@ impl<'a> PlatformEmulator for MshvEmulatorContext<'a> {
/// Wrapper over Mshv VM ioctls. /// Wrapper over Mshv VM ioctls.
pub struct MshvVm { pub struct MshvVm {
fd: Arc<VmFd>, fd: Arc<VmFd>,
#[cfg(target_arch = "x86_64")]
msrs: Vec<MsrEntry>, msrs: Vec<MsrEntry>,
dirty_log_slots: Arc<RwLock<HashMap<u64, MshvDirtyLogSlot>>>, dirty_log_slots: Arc<RwLock<HashMap<u64, MshvDirtyLogSlot>>>,
#[cfg(feature = "sev_snp")] #[cfg(feature = "sev_snp")]