hypervisor: Tune Vaia trait to work with fdt setup

Previous `Vaia` implementation uses types as it is, thus the property
string generated for fdt setup requires additional type conversion.
Change the types used in the methods of `Vaia` trait to provide a
concise fdt setup process.

Signed-off-by: Ruoqing He <heruoqing@iscas.ac.cn>
This commit is contained in:
Ruoqing He 2024-11-29 16:35:09 +08:00 committed by Rob Bradford
parent 30cf1eed5e
commit 9006013c60
2 changed files with 25 additions and 26 deletions

View File

@ -26,11 +26,9 @@ pub type Result<T> = result::Result<T, Error>;
#[derive(Debug)] #[derive(Debug)]
pub struct VaiaConfig { pub struct VaiaConfig {
pub vcpu_count: u64, pub vcpu_count: u32,
pub aplic_addr: u64, pub aplic_addr: u64,
pub aplic_size: u64,
pub imsic_addr: u64, pub imsic_addr: u64,
pub imsic_size: u64,
pub nr_irqs: u32, pub nr_irqs: u32,
} }
@ -40,16 +38,16 @@ pub trait Vaia: Send + Sync {
fn aplic_compatibility(&self) -> &str; fn aplic_compatibility(&self) -> &str;
/// Returns an array with APLIC device properties /// Returns an array with APLIC device properties
fn aplic_properties(&self) -> [u64; 4]; fn aplic_properties(&self) -> [u32; 4];
/// Returns the compatibility property of IMSIC /// Returns the compatibility property of IMSIC
fn imsic_compatibility(&self) -> &str; fn imsic_compatibility(&self) -> &str;
/// Returns an array with IMSIC device properties /// Returns an array with IMSIC device properties
fn imsic_properties(&self) -> [u64; 4]; fn imsic_properties(&self) -> [u32; 4];
/// Returns the number of vCPUs this AIA handles /// Returns the number of vCPUs this AIA handles
fn vcpu_count(&self) -> u64; fn vcpu_count(&self) -> u32;
/// Returns whether the AIA device is MSI compatible or not /// Returns whether the AIA device is MSI compatible or not
fn msi_compatible(&self) -> bool; fn msi_compatible(&self) -> bool;

View File

@ -19,17 +19,11 @@ pub struct KvmAiaImsics {
/// AIA APLIC address /// AIA APLIC address
aplic_addr: u64, aplic_addr: u64,
/// AIA APLIC size
aplic_size: u64,
/// AIA IMSIC address /// AIA IMSIC address
imsic_addr: u64, imsic_addr: u64,
/// AIA IMSIC size
imsic_size: u64,
/// Number of CPUs handled by the device /// Number of CPUs handled by the device
vcpu_count: u64, vcpu_count: u32,
} }
#[derive(Clone, Default, Serialize, Deserialize)] #[derive(Clone, Default, Serialize, Deserialize)]
@ -80,7 +74,7 @@ impl KvmAiaImsics {
// Report NR_IDS // Report NR_IDS
// Setting up hart_bits // Setting up hart_bits
let max_hart_index = self.vcpu_count - 1; let max_hart_index = self.vcpu_count as u64 - 1;
let hart_bits = std::cmp::max(64 - max_hart_index.leading_zeros(), 1); let hart_bits = std::cmp::max(64 - max_hart_index.leading_zeros(), 1);
Self::set_device_attribute( Self::set_device_attribute(
&self.device, &self.device,
@ -102,9 +96,10 @@ impl KvmAiaImsics {
)?; )?;
// Helpers to calculate address and attribute of IMSIC of each vCPU // Helpers to calculate address and attribute of IMSIC of each vCPU
let riscv_imsic_addr_of = let riscv_imsic_addr_of = |cpu_index: u32| -> u64 {
|cpu_index: u64| -> u64 { self.imsic_addr + cpu_index * self.imsic_size }; self.imsic_addr + (cpu_index * kvm_bindings::KVM_DEV_RISCV_IMSIC_SIZE) as u64
let riscv_imsic_attr_of = |cpu_index: u64| -> u64 { cpu_index }; };
let riscv_imsic_attr_of = |cpu_index: u32| -> u64 { cpu_index as u64 };
// Setting up RISC-V IMSICs // Setting up RISC-V IMSICs
for cpu_index in 0..self.vcpu_count { for cpu_index in 0..self.vcpu_count {
@ -196,9 +191,7 @@ impl KvmAiaImsics {
device: vaia, device: vaia,
vcpu_count: config.vcpu_count, vcpu_count: config.vcpu_count,
aplic_addr: config.aplic_addr, aplic_addr: config.aplic_addr,
aplic_size: config.aplic_size,
imsic_addr: config.imsic_addr, imsic_addr: config.imsic_addr,
imsic_size: config.imsic_size,
}; };
aia_device.init_device_attributes(config.nr_irqs)?; aia_device.init_device_attributes(config.nr_irqs)?;
@ -212,19 +205,29 @@ impl Vaia for KvmAiaImsics {
"riscv,aplic" "riscv,aplic"
} }
fn aplic_properties(&self) -> [u64; 4] { fn aplic_properties(&self) -> [u32; 4] {
[0, self.aplic_addr, 0, self.aplic_size] [
0,
self.aplic_addr as u32,
0,
kvm_bindings::KVM_DEV_RISCV_APLIC_SIZE,
]
} }
fn imsic_compatibility(&self) -> &str { fn imsic_compatibility(&self) -> &str {
"riscv,imsics" "riscv,imsics"
} }
fn imsic_properties(&self) -> [u64; 4] { fn imsic_properties(&self) -> [u32; 4] {
[0, self.imsic_addr, 0, self.imsic_size * self.vcpu_count] [
0,
self.imsic_addr as u32,
0,
kvm_bindings::KVM_DEV_RISCV_IMSIC_SIZE * self.vcpu_count,
]
} }
fn vcpu_count(&self) -> u64 { fn vcpu_count(&self) -> u32 {
self.vcpu_count self.vcpu_count
} }
@ -256,9 +259,7 @@ mod tests {
VaiaConfig { VaiaConfig {
vcpu_count: 1, vcpu_count: 1,
aplic_addr: 0xd000000, aplic_addr: 0xd000000,
aplic_size: 0x4000,
imsic_addr: 0x2800000, imsic_addr: 0x2800000,
imsic_size: 0x1000,
nr_irqs: 256, nr_irqs: 256,
} }
} }