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hypervisor: Tune Vaia trait to work with fdt setup
Previous `Vaia` implementation uses types as it is, thus the property string generated for fdt setup requires additional type conversion. Change the types used in the methods of `Vaia` trait to provide a concise fdt setup process. Signed-off-by: Ruoqing He <heruoqing@iscas.ac.cn>
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@ -26,11 +26,9 @@ pub type Result<T> = result::Result<T, Error>;
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#[derive(Debug)]
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#[derive(Debug)]
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pub struct VaiaConfig {
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pub struct VaiaConfig {
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pub vcpu_count: u64,
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pub vcpu_count: u32,
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pub aplic_addr: u64,
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pub aplic_addr: u64,
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pub aplic_size: u64,
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pub imsic_addr: u64,
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pub imsic_addr: u64,
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pub imsic_size: u64,
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pub nr_irqs: u32,
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pub nr_irqs: u32,
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}
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}
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@ -40,16 +38,16 @@ pub trait Vaia: Send + Sync {
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fn aplic_compatibility(&self) -> &str;
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fn aplic_compatibility(&self) -> &str;
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/// Returns an array with APLIC device properties
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/// Returns an array with APLIC device properties
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fn aplic_properties(&self) -> [u64; 4];
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fn aplic_properties(&self) -> [u32; 4];
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/// Returns the compatibility property of IMSIC
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/// Returns the compatibility property of IMSIC
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fn imsic_compatibility(&self) -> &str;
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fn imsic_compatibility(&self) -> &str;
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/// Returns an array with IMSIC device properties
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/// Returns an array with IMSIC device properties
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fn imsic_properties(&self) -> [u64; 4];
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fn imsic_properties(&self) -> [u32; 4];
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/// Returns the number of vCPUs this AIA handles
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/// Returns the number of vCPUs this AIA handles
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fn vcpu_count(&self) -> u64;
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fn vcpu_count(&self) -> u32;
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/// Returns whether the AIA device is MSI compatible or not
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/// Returns whether the AIA device is MSI compatible or not
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fn msi_compatible(&self) -> bool;
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fn msi_compatible(&self) -> bool;
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@ -19,17 +19,11 @@ pub struct KvmAiaImsics {
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/// AIA APLIC address
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/// AIA APLIC address
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aplic_addr: u64,
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aplic_addr: u64,
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/// AIA APLIC size
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aplic_size: u64,
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/// AIA IMSIC address
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/// AIA IMSIC address
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imsic_addr: u64,
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imsic_addr: u64,
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/// AIA IMSIC size
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imsic_size: u64,
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/// Number of CPUs handled by the device
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/// Number of CPUs handled by the device
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vcpu_count: u64,
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vcpu_count: u32,
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}
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}
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#[derive(Clone, Default, Serialize, Deserialize)]
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#[derive(Clone, Default, Serialize, Deserialize)]
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@ -80,7 +74,7 @@ impl KvmAiaImsics {
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// Report NR_IDS
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// Report NR_IDS
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// Setting up hart_bits
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// Setting up hart_bits
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let max_hart_index = self.vcpu_count - 1;
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let max_hart_index = self.vcpu_count as u64 - 1;
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let hart_bits = std::cmp::max(64 - max_hart_index.leading_zeros(), 1);
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let hart_bits = std::cmp::max(64 - max_hart_index.leading_zeros(), 1);
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Self::set_device_attribute(
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Self::set_device_attribute(
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&self.device,
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&self.device,
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@ -102,9 +96,10 @@ impl KvmAiaImsics {
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)?;
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)?;
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// Helpers to calculate address and attribute of IMSIC of each vCPU
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// Helpers to calculate address and attribute of IMSIC of each vCPU
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let riscv_imsic_addr_of =
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let riscv_imsic_addr_of = |cpu_index: u32| -> u64 {
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|cpu_index: u64| -> u64 { self.imsic_addr + cpu_index * self.imsic_size };
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self.imsic_addr + (cpu_index * kvm_bindings::KVM_DEV_RISCV_IMSIC_SIZE) as u64
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let riscv_imsic_attr_of = |cpu_index: u64| -> u64 { cpu_index };
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};
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let riscv_imsic_attr_of = |cpu_index: u32| -> u64 { cpu_index as u64 };
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// Setting up RISC-V IMSICs
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// Setting up RISC-V IMSICs
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for cpu_index in 0..self.vcpu_count {
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for cpu_index in 0..self.vcpu_count {
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@ -196,9 +191,7 @@ impl KvmAiaImsics {
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device: vaia,
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device: vaia,
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vcpu_count: config.vcpu_count,
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vcpu_count: config.vcpu_count,
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aplic_addr: config.aplic_addr,
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aplic_addr: config.aplic_addr,
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aplic_size: config.aplic_size,
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imsic_addr: config.imsic_addr,
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imsic_addr: config.imsic_addr,
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imsic_size: config.imsic_size,
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};
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};
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aia_device.init_device_attributes(config.nr_irqs)?;
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aia_device.init_device_attributes(config.nr_irqs)?;
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@ -212,19 +205,29 @@ impl Vaia for KvmAiaImsics {
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"riscv,aplic"
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"riscv,aplic"
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}
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}
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fn aplic_properties(&self) -> [u64; 4] {
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fn aplic_properties(&self) -> [u32; 4] {
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[0, self.aplic_addr, 0, self.aplic_size]
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[
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0,
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self.aplic_addr as u32,
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0,
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kvm_bindings::KVM_DEV_RISCV_APLIC_SIZE,
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]
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}
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}
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fn imsic_compatibility(&self) -> &str {
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fn imsic_compatibility(&self) -> &str {
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"riscv,imsics"
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"riscv,imsics"
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}
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}
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fn imsic_properties(&self) -> [u64; 4] {
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fn imsic_properties(&self) -> [u32; 4] {
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[0, self.imsic_addr, 0, self.imsic_size * self.vcpu_count]
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[
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0,
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self.imsic_addr as u32,
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0,
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kvm_bindings::KVM_DEV_RISCV_IMSIC_SIZE * self.vcpu_count,
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]
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}
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}
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fn vcpu_count(&self) -> u64 {
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fn vcpu_count(&self) -> u32 {
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self.vcpu_count
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self.vcpu_count
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}
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}
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@ -256,9 +259,7 @@ mod tests {
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VaiaConfig {
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VaiaConfig {
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vcpu_count: 1,
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vcpu_count: 1,
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aplic_addr: 0xd000000,
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aplic_addr: 0xd000000,
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aplic_size: 0x4000,
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imsic_addr: 0x2800000,
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imsic_addr: 0x2800000,
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imsic_size: 0x1000,
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nr_irqs: 256,
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nr_irqs: 256,
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}
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}
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}
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}
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