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devices, vmm: Upgrade exit reasons to info!() level debugging

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These statements are useful for understanding the cause of reset or
shutdown of the VM and are not spammy so should be included at info!()
level.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
This commit is contained in:
Rob Bradford 2021-09-03 10:27:21 +01:00 committed by Bo Chen
parent df3b20f472
commit 968902dfec
3 changed files with 5 additions and 5 deletions
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4
devices/src/acpi.rs
View File

@ -41,7 +41,7 @@ impl BusDevice for AcpiShutdownDevice {
fn write(&mut self, _base: u64, _offset: u64, data: &[u8]) -> Option<Arc<Barrier>> { fn write(&mut self, _base: u64, _offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {
if data[0] == 1 { if data[0] == 1 {
debug!("ACPI Reboot signalled"); info!("ACPI Reboot signalled");
if let Err(e) = self.reset_evt.write(1) { if let Err(e) = self.reset_evt.write(1) {
error!("Error triggering ACPI reset event: {}", e); error!("Error triggering ACPI reset event: {}", e);
} }
@ -51,7 +51,7 @@ impl BusDevice for AcpiShutdownDevice {
const SLEEP_STATUS_EN_BIT: u8 = 5; const SLEEP_STATUS_EN_BIT: u8 = 5;
const SLEEP_VALUE_BIT: u8 = 2; const SLEEP_VALUE_BIT: u8 = 2;
if data[0] == (S5_SLEEP_VALUE << SLEEP_VALUE_BIT) | (1 << SLEEP_STATUS_EN_BIT) { if data[0] == (S5_SLEEP_VALUE << SLEEP_VALUE_BIT) | (1 << SLEEP_STATUS_EN_BIT) {
debug!("ACPI Shutdown signalled"); info!("ACPI Shutdown signalled");
if let Err(e) = self.exit_evt.write(1) { if let Err(e) = self.exit_evt.write(1) {
error!("Error triggering ACPI shutdown event: {}", e); error!("Error triggering ACPI shutdown event: {}", e);
} }

2
devices/src/legacy/i8042.rs
View File

@ -34,7 +34,7 @@ impl BusDevice for I8042Device {
fn write(&mut self, _base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> { fn write(&mut self, _base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {
if data.len() == 1 && data[0] == 0xfe && offset == 3 { if data.len() == 1 && data[0] == 0xfe && offset == 3 {
debug!("i8042 reset signalled"); info!("i8042 reset signalled");
if let Err(e) = self.reset_evt.write(1) { if let Err(e) = self.reset_evt.write(1) {
error!("Error triggering i8042 reset event: {}", e); error!("Error triggering i8042 reset event: {}", e);
} }

4
vmm/src/cpu.rs
View File

@ -786,13 +786,13 @@ impl CpuManager {
VmExit::Ignore => {} VmExit::Ignore => {}
VmExit::Hyperv => {} VmExit::Hyperv => {}
VmExit::Reset => { VmExit::Reset => {
debug!("VmExit::Reset"); info!("VmExit::Reset");
vcpu_run_interrupted.store(true, Ordering::SeqCst); vcpu_run_interrupted.store(true, Ordering::SeqCst);
reset_evt.write(1).unwrap(); reset_evt.write(1).unwrap();
break; break;
} }
VmExit::Shutdown => { VmExit::Shutdown => {
debug!("VmExit::Shutdown"); info!("VmExit::Shutdown");
vcpu_run_interrupted.store(true, Ordering::SeqCst); vcpu_run_interrupted.store(true, Ordering::SeqCst);
exit_evt.write(1).unwrap(); exit_evt.write(1).unwrap();
break; break;