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https://github.com/cloud-hypervisor/cloud-hypervisor.git
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hypervisor: Support enabling HyperV synthetic interrupt controller
This adds a KVM HyperV synthetic interrupt controller in place of the emulated PIC. Signed-off-by: Rob Bradford <robert.bradford@intel.com>
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@ -148,6 +148,11 @@ pub enum HypervisorCpuError {
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///
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///
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#[error("Failed to notify guest its clock was paused: {0}")]
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#[error("Failed to notify guest its clock was paused: {0}")]
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NotifyGuestClockPaused(#[source] anyhow::Error),
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NotifyGuestClockPaused(#[source] anyhow::Error),
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///
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/// Enabling HyperV SynIC error
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///
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#[error("Failed to enable HyperV SynIC")]
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EnableHyperVSynIC(#[source] anyhow::Error),
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}
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}
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#[derive(Debug)]
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#[derive(Debug)]
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@ -210,6 +215,11 @@ pub trait Vcpu: Send + Sync {
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fn set_cpuid2(&self, cpuid: &CpuId) -> Result<()>;
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fn set_cpuid2(&self, cpuid: &CpuId) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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#[cfg(target_arch = "x86_64")]
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///
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///
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/// X86 specific call to enable HyperV SynIC
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///
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fn enable_hyperv_synic(&self) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// X86 specific call to retrieve the CPUID registers.
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/// X86 specific call to retrieve the CPUID registers.
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///
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///
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fn get_cpuid2(&self, num_entries: usize) -> Result<CpuId>;
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fn get_cpuid2(&self, num_entries: usize) -> Result<CpuId>;
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@ -38,7 +38,7 @@ pub use x86_64::{
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};
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};
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#[cfg(target_arch = "x86_64")]
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#[cfg(target_arch = "x86_64")]
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use kvm_bindings::{kvm_enable_cap, MsrList, KVM_CAP_SPLIT_IRQCHIP};
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use kvm_bindings::{kvm_enable_cap, MsrList, KVM_CAP_HYPERV_SYNIC, KVM_CAP_SPLIT_IRQCHIP};
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#[cfg(target_arch = "x86_64")]
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#[cfg(target_arch = "x86_64")]
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use crate::arch::x86::NUM_IOAPIC_PINS;
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use crate::arch::x86::NUM_IOAPIC_PINS;
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@ -550,6 +550,17 @@ impl cpu::Vcpu for KvmVcpu {
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.set_cpuid2(cpuid)
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.set_cpuid2(cpuid)
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.map_err(|e| cpu::HypervisorCpuError::SetCpuid(e.into()))
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.map_err(|e| cpu::HypervisorCpuError::SetCpuid(e.into()))
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}
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}
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#[cfg(target_arch = "x86_64")]
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///
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/// X86 specific call to enable HyperV SynIC
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///
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fn enable_hyperv_synic(&self) -> cpu::Result<()> {
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let mut cap: kvm_enable_cap = Default::default();
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cap.cap = KVM_CAP_HYPERV_SYNIC;
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self.fd
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.enable_cap(&cap)
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.map_err(|e| cpu::HypervisorCpuError::EnableHyperVSynIC(e.into()))
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}
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///
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///
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/// X86 specific call to retrieve the CPUID registers.
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/// X86 specific call to retrieve the CPUID registers.
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///
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///
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