mirror of
https://github.com/cloud-hypervisor/cloud-hypervisor.git
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hypervisor: mshv: Refactor x86 emulator into different module
This is a preparatory work to make space for ARM64 emulator. There is no functional change in this commit, just moving code from one file to another. Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
This commit is contained in:
Jinank Jain
Liu Wei
parent
ead4f767ff
commit
b73d94f969
@ -3,18 +3,15 @@
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// Copyright © 2020, Microsoft Corporation
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//
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use crate::arch::emulator::{PlatformEmulator, PlatformError};
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use crate::arch::emulator::PlatformEmulator;
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#[cfg(target_arch = "x86_64")]
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use crate::arch::x86::emulator::{CpuStateManager, Emulator, EmulatorCpuState};
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use crate::arch::x86::emulator::Emulator;
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use crate::cpu;
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use crate::cpu::Vcpu;
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use crate::hypervisor;
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use crate::mshv::emulator::MshvEmulatorContext;
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use crate::vec_with_array_field;
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use crate::vm::{self, InterruptSourceConfig, VmOps};
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use crate::HypervisorType;
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#[cfg(target_arch = "x86_64")]
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use iced_x86::Register;
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use mshv_bindings::*;
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use mshv_ioctls::{set_registers_64, InterruptRequest, Mshv, NoDatamatch, VcpuFd, VmFd, VmType};
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use std::any::Any;
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@ -22,18 +19,15 @@ use std::collections::HashMap;
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use std::sync::{Arc, RwLock};
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use vfio_ioctls::VfioDeviceFd;
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use vm::DataMatch;
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#[cfg(feature = "sev_snp")]
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mod snp_constants;
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// x86_64 dependencies
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#[cfg(target_arch = "x86_64")]
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pub mod x86_64;
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#[cfg(feature = "sev_snp")]
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use snp_constants::*;
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#[cfg(target_arch = "x86_64")]
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use crate::arch::x86::{CpuIdEntry, FpuState, MsrEntry};
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#[cfg(target_arch = "x86_64")]
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use crate::ClockData;
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use crate::{
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CpuState, IoEventAddress, IrqRoutingEntry, MpState, UserMemoryRegion,
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USER_MEMORY_REGION_ADJUSTABLE, USER_MEMORY_REGION_EXECUTE, USER_MEMORY_REGION_READ,
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@ -41,18 +35,16 @@ use crate::{
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};
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#[cfg(feature = "sev_snp")]
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use igvm_defs::IGVM_VHS_SNP_ID_BLOCK;
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use vmm_sys_util::eventfd::EventFd;
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#[cfg(target_arch = "x86_64")]
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pub use x86_64::VcpuMshvState;
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#[cfg(target_arch = "x86_64")]
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pub use x86_64::*;
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#[cfg(feature = "sev_snp")]
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use snp_constants::*;
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#[cfg(target_arch = "x86_64")]
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use std::fs::File;
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use std::os::unix::io::AsRawFd;
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use vmm_sys_util::eventfd::EventFd;
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#[cfg(target_arch = "x86_64")]
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use crate::arch::x86::{CpuIdEntry, FpuState, MsrEntry};
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pub use x86_64::*;
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#[cfg(target_arch = "x86_64")]
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pub use x86_64::{emulator, VcpuMshvState};
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const DIRTY_BITMAP_CLEAR_DIRTY: u64 = 0x4;
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const DIRTY_BITMAP_SET_DIRTY: u64 = 0x8;
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@ -1520,143 +1512,6 @@ impl MshvVcpu {
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}
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}
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#[cfg(target_arch = "x86_64")]
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struct MshvEmulatorContext<'a> {
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vcpu: &'a MshvVcpu,
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map: (u64, u64), // Initial GVA to GPA mapping provided by the hypervisor
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}
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#[cfg(target_arch = "x86_64")]
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impl<'a> MshvEmulatorContext<'a> {
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// Do the actual gva -> gpa translation
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#[allow(non_upper_case_globals)]
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fn translate(&self, gva: u64, flags: u32) -> Result<u64, PlatformError> {
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if self.map.0 == gva {
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return Ok(self.map.1);
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}
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let (gpa, result_code) = self
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.vcpu
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.translate_gva(gva, flags.into())
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.map_err(|e| PlatformError::TranslateVirtualAddress(anyhow!(e)))?;
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match result_code {
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hv_translate_gva_result_code_HV_TRANSLATE_GVA_SUCCESS => Ok(gpa),
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_ => Err(PlatformError::TranslateVirtualAddress(anyhow!(result_code))),
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}
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}
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fn read_memory_flags(
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&self,
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gva: u64,
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data: &mut [u8],
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flags: u32,
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) -> Result<(), PlatformError> {
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let gpa = self.translate(gva, flags)?;
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debug!(
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"mshv emulator: memory read {} bytes from [{:#x} -> {:#x}]",
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data.len(),
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gva,
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gpa
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);
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if let Some(vm_ops) = &self.vcpu.vm_ops {
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if vm_ops.guest_mem_read(gpa, data).is_err() {
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vm_ops
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.mmio_read(gpa, data)
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.map_err(|e| PlatformError::MemoryReadFailure(e.into()))?;
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}
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}
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Ok(())
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}
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}
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#[cfg(target_arch = "x86_64")]
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/// Platform emulation for Hyper-V
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impl<'a> PlatformEmulator for MshvEmulatorContext<'a> {
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type CpuState = EmulatorCpuState;
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fn read_memory(&self, gva: u64, data: &mut [u8]) -> Result<(), PlatformError> {
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self.read_memory_flags(gva, data, HV_TRANSLATE_GVA_VALIDATE_READ)
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}
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fn write_memory(&mut self, gva: u64, data: &[u8]) -> Result<(), PlatformError> {
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let gpa = self.translate(gva, HV_TRANSLATE_GVA_VALIDATE_WRITE)?;
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debug!(
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"mshv emulator: memory write {} bytes at [{:#x} -> {:#x}]",
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data.len(),
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gva,
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gpa
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);
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if let Some(vm_ops) = &self.vcpu.vm_ops {
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if vm_ops.guest_mem_write(gpa, data).is_err() {
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vm_ops
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.mmio_write(gpa, data)
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.map_err(|e| PlatformError::MemoryWriteFailure(e.into()))?;
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}
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}
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Ok(())
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}
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fn cpu_state(&self, cpu_id: usize) -> Result<Self::CpuState, PlatformError> {
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if cpu_id != self.vcpu.vp_index as usize {
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return Err(PlatformError::GetCpuStateFailure(anyhow!(
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"CPU id mismatch {:?} {:?}",
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cpu_id,
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self.vcpu.vp_index
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)));
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}
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let regs = self
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.vcpu
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.get_regs()
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.map_err(|e| PlatformError::GetCpuStateFailure(e.into()))?;
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let sregs = self
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.vcpu
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.get_sregs()
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.map_err(|e| PlatformError::GetCpuStateFailure(e.into()))?;
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debug!("mshv emulator: Getting new CPU state");
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debug!("mshv emulator: {:#x?}", regs);
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Ok(EmulatorCpuState { regs, sregs })
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}
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fn set_cpu_state(&self, cpu_id: usize, state: Self::CpuState) -> Result<(), PlatformError> {
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if cpu_id != self.vcpu.vp_index as usize {
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return Err(PlatformError::SetCpuStateFailure(anyhow!(
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"CPU id mismatch {:?} {:?}",
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cpu_id,
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self.vcpu.vp_index
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)));
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}
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debug!("mshv emulator: Setting new CPU state");
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debug!("mshv emulator: {:#x?}", state.regs);
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self.vcpu
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.set_regs(&state.regs)
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.map_err(|e| PlatformError::SetCpuStateFailure(e.into()))?;
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self.vcpu
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.set_sregs(&state.sregs)
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.map_err(|e| PlatformError::SetCpuStateFailure(e.into()))
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}
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fn fetch(&self, ip: u64, instruction_bytes: &mut [u8]) -> Result<(), PlatformError> {
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let rip =
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self.cpu_state(self.vcpu.vp_index as usize)?
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.linearize(Register::CS, ip, false)?;
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self.read_memory_flags(
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rip,
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instruction_bytes,
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HV_TRANSLATE_GVA_VALIDATE_READ | HV_TRANSLATE_GVA_VALIDATE_EXECUTE,
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)
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}
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}
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/// Wrapper over Mshv VM ioctls.
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pub struct MshvVm {
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fd: Arc<VmFd>,
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145
hypervisor/src/mshv/x86_64/emulator.rs
Normal file
145
hypervisor/src/mshv/x86_64/emulator.rs
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@ -0,0 +1,145 @@
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// SPDX-License-Identifier: Apache-2.0 OR BSD-3-Clause
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//
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// Copyright © 2024, Microsoft Corporation
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//
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use crate::arch::emulator::{PlatformEmulator, PlatformError};
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use crate::arch::x86::emulator::{CpuStateManager, EmulatorCpuState};
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use crate::cpu::Vcpu;
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use crate::mshv::MshvVcpu;
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use iced_x86::Register;
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use mshv_bindings::*;
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pub struct MshvEmulatorContext<'a> {
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pub vcpu: &'a MshvVcpu,
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pub map: (u64, u64), // Initial GVA to GPA mapping provided by the hypervisor
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}
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impl<'a> MshvEmulatorContext<'a> {
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// Do the actual gva -> gpa translation
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#[allow(non_upper_case_globals)]
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fn translate(&self, gva: u64, flags: u32) -> Result<u64, PlatformError> {
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if self.map.0 == gva {
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return Ok(self.map.1);
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}
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let (gpa, result_code) = self
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.vcpu
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.translate_gva(gva, flags.into())
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.map_err(|e| PlatformError::TranslateVirtualAddress(anyhow!(e)))?;
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match result_code {
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hv_translate_gva_result_code_HV_TRANSLATE_GVA_SUCCESS => Ok(gpa),
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_ => Err(PlatformError::TranslateVirtualAddress(anyhow!(result_code))),
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}
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}
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fn read_memory_flags(
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&self,
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gva: u64,
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data: &mut [u8],
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flags: u32,
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) -> Result<(), PlatformError> {
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let gpa = self.translate(gva, flags)?;
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debug!(
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"mshv emulator: memory read {} bytes from [{:#x} -> {:#x}]",
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data.len(),
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gva,
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gpa
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);
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if let Some(vm_ops) = &self.vcpu.vm_ops {
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if vm_ops.guest_mem_read(gpa, data).is_err() {
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vm_ops
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.mmio_read(gpa, data)
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.map_err(|e| PlatformError::MemoryReadFailure(e.into()))?;
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}
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}
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Ok(())
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}
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}
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/// Platform emulation for Hyper-V
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impl<'a> PlatformEmulator for MshvEmulatorContext<'a> {
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type CpuState = EmulatorCpuState;
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fn read_memory(&self, gva: u64, data: &mut [u8]) -> Result<(), PlatformError> {
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self.read_memory_flags(gva, data, HV_TRANSLATE_GVA_VALIDATE_READ)
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}
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fn write_memory(&mut self, gva: u64, data: &[u8]) -> Result<(), PlatformError> {
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let gpa = self.translate(gva, HV_TRANSLATE_GVA_VALIDATE_WRITE)?;
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debug!(
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"mshv emulator: memory write {} bytes at [{:#x} -> {:#x}]",
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data.len(),
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gva,
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gpa
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);
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if let Some(vm_ops) = &self.vcpu.vm_ops {
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if vm_ops.guest_mem_write(gpa, data).is_err() {
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vm_ops
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.mmio_write(gpa, data)
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.map_err(|e| PlatformError::MemoryWriteFailure(e.into()))?;
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}
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}
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Ok(())
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}
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fn cpu_state(&self, cpu_id: usize) -> Result<Self::CpuState, PlatformError> {
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if cpu_id != self.vcpu.vp_index as usize {
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return Err(PlatformError::GetCpuStateFailure(anyhow!(
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"CPU id mismatch {:?} {:?}",
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cpu_id,
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self.vcpu.vp_index
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)));
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}
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let regs = self
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.vcpu
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.get_regs()
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.map_err(|e| PlatformError::GetCpuStateFailure(e.into()))?;
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let sregs = self
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.vcpu
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.get_sregs()
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.map_err(|e| PlatformError::GetCpuStateFailure(e.into()))?;
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debug!("mshv emulator: Getting new CPU state");
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debug!("mshv emulator: {:#x?}", regs);
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Ok(EmulatorCpuState { regs, sregs })
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}
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fn set_cpu_state(&self, cpu_id: usize, state: Self::CpuState) -> Result<(), PlatformError> {
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if cpu_id != self.vcpu.vp_index as usize {
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return Err(PlatformError::SetCpuStateFailure(anyhow!(
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"CPU id mismatch {:?} {:?}",
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cpu_id,
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self.vcpu.vp_index
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)));
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}
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debug!("mshv emulator: Setting new CPU state");
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debug!("mshv emulator: {:#x?}", state.regs);
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self.vcpu
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.set_regs(&state.regs)
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.map_err(|e| PlatformError::SetCpuStateFailure(e.into()))?;
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self.vcpu
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.set_sregs(&state.sregs)
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.map_err(|e| PlatformError::SetCpuStateFailure(e.into()))
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}
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fn fetch(&self, ip: u64, instruction_bytes: &mut [u8]) -> Result<(), PlatformError> {
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let rip =
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self.cpu_state(self.vcpu.vp_index as usize)?
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.linearize(Register::CS, ip, false)?;
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self.read_memory_flags(
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rip,
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instruction_bytes,
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HV_TRANSLATE_GVA_VALIDATE_READ | HV_TRANSLATE_GVA_VALIDATE_EXECUTE,
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)
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}
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}
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@ -14,6 +14,8 @@ use crate::arch::x86::{
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use serde::{Deserialize, Serialize};
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use std::fmt;
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pub mod emulator;
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///
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/// Export generically-named wrappers of mshv_bindings for Unix-based platforms
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///
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