mirror of
https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2024-12-22 13:45:20 +00:00
hypervisor: vmm: Switch to common StandardRegisters implementation
Use the StandardRegisters defined in the hypervisor crate instead of re-defining it from MSHV/KVM crate. Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
This commit is contained in:
parent
a987c3d0fc
commit
ba262e45a4
@ -9,14 +9,13 @@
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//
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//
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#[cfg(target_arch = "aarch64")]
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#[cfg(target_arch = "aarch64")]
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use crate::aarch64::{RegList, StandardRegisters, VcpuInit};
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use crate::aarch64::{RegList, VcpuInit};
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#[cfg(target_arch = "x86_64")]
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#[cfg(target_arch = "x86_64")]
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use crate::arch::x86::{CpuIdEntry, FpuState, LapicState, MsrEntry, SpecialRegisters};
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use crate::arch::x86::{CpuIdEntry, FpuState, LapicState, MsrEntry, SpecialRegisters};
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#[cfg(feature = "tdx")]
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#[cfg(feature = "tdx")]
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use crate::kvm::{TdxExitDetails, TdxExitStatus};
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use crate::kvm::{TdxExitDetails, TdxExitStatus};
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use crate::CpuState;
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use crate::CpuState;
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use crate::MpState;
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use crate::MpState;
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#[cfg(target_arch = "x86_64")]
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use crate::StandardRegisters;
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use crate::StandardRegisters;
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use thiserror::Error;
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use thiserror::Error;
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use vm_memory::GuestAddress;
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use vm_memory::GuestAddress;
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@ -48,14 +48,13 @@ use crate::arch::x86::{
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};
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};
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#[cfg(target_arch = "x86_64")]
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#[cfg(target_arch = "x86_64")]
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use crate::ClockData;
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use crate::ClockData;
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#[cfg(target_arch = "x86_64")]
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use crate::StandardRegisters;
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use crate::StandardRegisters;
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use crate::{
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use crate::{
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CpuState, IoEventAddress, IrqRoutingEntry, MpState, UserMemoryRegion,
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CpuState, IoEventAddress, IrqRoutingEntry, MpState, UserMemoryRegion,
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USER_MEMORY_REGION_LOG_DIRTY, USER_MEMORY_REGION_READ, USER_MEMORY_REGION_WRITE,
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USER_MEMORY_REGION_LOG_DIRTY, USER_MEMORY_REGION_READ, USER_MEMORY_REGION_WRITE,
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};
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};
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#[cfg(target_arch = "aarch64")]
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#[cfg(target_arch = "aarch64")]
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use aarch64::{RegList, Register, StandardRegisters};
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use aarch64::{RegList, Register};
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#[cfg(target_arch = "x86_64")]
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#[cfg(target_arch = "x86_64")]
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use kvm_bindings::{
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use kvm_bindings::{
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kvm_enable_cap, kvm_msr_entry, MsrList, KVM_CAP_HYPERV_SYNIC, KVM_CAP_SPLIT_IRQCHIP,
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kvm_enable_cap, kvm_msr_entry, MsrList, KVM_CAP_HYPERV_SYNIC, KVM_CAP_SPLIT_IRQCHIP,
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@ -1236,7 +1235,7 @@ impl cpu::Vcpu for KvmVcpu {
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///
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///
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#[cfg(target_arch = "aarch64")]
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#[cfg(target_arch = "aarch64")]
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fn get_regs(&self) -> cpu::Result<StandardRegisters> {
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fn get_regs(&self) -> cpu::Result<StandardRegisters> {
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let mut state: StandardRegisters = kvm_regs::default();
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let mut state = kvm_regs::default();
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let mut off = offset_of!(user_pt_regs, regs);
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let mut off = offset_of!(user_pt_regs, regs);
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// There are 31 user_pt_regs:
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// There are 31 user_pt_regs:
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// https://elixir.free-electrons.com/linux/v4.14.174/source/arch/arm64/include/uapi/asm/ptrace.h#L72
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// https://elixir.free-electrons.com/linux/v4.14.174/source/arch/arm64/include/uapi/asm/ptrace.h#L72
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@ -1351,7 +1350,7 @@ impl cpu::Vcpu for KvmVcpu {
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U32, off), &mut bytes)
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U32, off), &mut bytes)
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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state.fp_regs.fpcr = u32::from_le_bytes(bytes);
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state.fp_regs.fpcr = u32::from_le_bytes(bytes);
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Ok(state)
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Ok(state.into())
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}
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}
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#[cfg(target_arch = "x86_64")]
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#[cfg(target_arch = "x86_64")]
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@ -1376,6 +1375,7 @@ impl cpu::Vcpu for KvmVcpu {
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fn set_regs(&self, state: &StandardRegisters) -> cpu::Result<()> {
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fn set_regs(&self, state: &StandardRegisters) -> cpu::Result<()> {
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// The function follows the exact identical order from `state`. Look there
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// The function follows the exact identical order from `state`. Look there
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// for some additional info on registers.
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// for some additional info on registers.
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let kvm_regs_state: kvm_regs = (*state).into();
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let mut off = offset_of!(user_pt_regs, regs);
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let mut off = offset_of!(user_pt_regs, regs);
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for i in 0..31 {
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for i in 0..31 {
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self.fd
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self.fd
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@ -1383,7 +1383,7 @@ impl cpu::Vcpu for KvmVcpu {
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.unwrap()
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.unwrap()
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.set_one_reg(
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.set_one_reg(
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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&state.regs.regs[i].to_le_bytes(),
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&kvm_regs_state.regs.regs[i].to_le_bytes(),
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)
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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off += std::mem::size_of::<u64>();
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off += std::mem::size_of::<u64>();
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@ -1395,7 +1395,7 @@ impl cpu::Vcpu for KvmVcpu {
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.unwrap()
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.unwrap()
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.set_one_reg(
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.set_one_reg(
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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&state.regs.sp.to_le_bytes(),
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&kvm_regs_state.regs.sp.to_le_bytes(),
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)
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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@ -1405,7 +1405,7 @@ impl cpu::Vcpu for KvmVcpu {
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.unwrap()
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.unwrap()
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.set_one_reg(
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.set_one_reg(
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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&state.regs.pc.to_le_bytes(),
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&kvm_regs_state.regs.pc.to_le_bytes(),
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)
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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@ -1415,7 +1415,7 @@ impl cpu::Vcpu for KvmVcpu {
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.unwrap()
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.unwrap()
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.set_one_reg(
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.set_one_reg(
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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&state.regs.pstate.to_le_bytes(),
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&kvm_regs_state.regs.pstate.to_le_bytes(),
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)
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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@ -1425,7 +1425,7 @@ impl cpu::Vcpu for KvmVcpu {
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.unwrap()
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.unwrap()
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.set_one_reg(
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.set_one_reg(
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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&state.sp_el1.to_le_bytes(),
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&kvm_regs_state.sp_el1.to_le_bytes(),
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)
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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@ -1435,7 +1435,7 @@ impl cpu::Vcpu for KvmVcpu {
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.unwrap()
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.unwrap()
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.set_one_reg(
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.set_one_reg(
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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&state.elr_el1.to_le_bytes(),
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&kvm_regs_state.elr_el1.to_le_bytes(),
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)
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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@ -1446,7 +1446,7 @@ impl cpu::Vcpu for KvmVcpu {
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.unwrap()
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.unwrap()
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.set_one_reg(
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.set_one_reg(
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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&state.spsr[i].to_le_bytes(),
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&kvm_regs_state.spsr[i].to_le_bytes(),
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)
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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off += std::mem::size_of::<u64>();
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off += std::mem::size_of::<u64>();
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@ -1459,7 +1459,7 @@ impl cpu::Vcpu for KvmVcpu {
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.unwrap()
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.unwrap()
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.set_one_reg(
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.set_one_reg(
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arm64_core_reg_id!(KVM_REG_SIZE_U128, off),
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arm64_core_reg_id!(KVM_REG_SIZE_U128, off),
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&state.fp_regs.vregs[i].to_le_bytes(),
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&kvm_regs_state.fp_regs.vregs[i].to_le_bytes(),
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)
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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off += mem::size_of::<u128>();
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off += mem::size_of::<u128>();
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@ -1471,7 +1471,7 @@ impl cpu::Vcpu for KvmVcpu {
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.unwrap()
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.unwrap()
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.set_one_reg(
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.set_one_reg(
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arm64_core_reg_id!(KVM_REG_SIZE_U32, off),
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arm64_core_reg_id!(KVM_REG_SIZE_U32, off),
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&state.fp_regs.fpsr.to_le_bytes(),
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&kvm_regs_state.fp_regs.fpsr.to_le_bytes(),
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)
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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@ -1481,7 +1481,7 @@ impl cpu::Vcpu for KvmVcpu {
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.unwrap()
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.unwrap()
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.set_one_reg(
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.set_one_reg(
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arm64_core_reg_id!(KVM_REG_SIZE_U32, off),
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arm64_core_reg_id!(KVM_REG_SIZE_U32, off),
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&state.fp_regs.fpcr.to_le_bytes(),
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&kvm_regs_state.fp_regs.fpcr.to_le_bytes(),
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)
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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Ok(())
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Ok(())
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@ -2123,7 +2123,7 @@ impl cpu::Vcpu for KvmVcpu {
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..Default::default()
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..Default::default()
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};
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};
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// Get core registers
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// Get core registers
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state.core_regs = self.get_regs()?;
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state.core_regs = self.get_regs()?.into();
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// Get systerm register
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// Get systerm register
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// Call KVM_GET_REG_LIST to get all registers available to the guest.
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// Call KVM_GET_REG_LIST to get all registers available to the guest.
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@ -2263,7 +2263,7 @@ impl cpu::Vcpu for KvmVcpu {
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fn set_state(&self, state: &CpuState) -> cpu::Result<()> {
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fn set_state(&self, state: &CpuState) -> cpu::Result<()> {
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let state: VcpuKvmState = state.clone().into();
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let state: VcpuKvmState = state.clone().into();
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// Set core registers
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// Set core registers
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self.set_regs(&state.core_regs)?;
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self.set_regs(&state.core_regs.into())?;
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// Set system registers
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// Set system registers
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for reg in &state.sys_regs {
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for reg in &state.sys_regs {
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self.fd
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self.fd
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@ -42,8 +42,6 @@ use devices::interrupt_controller::InterruptController;
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use gdbstub_arch::aarch64::reg::AArch64CoreRegs as CoreRegs;
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use gdbstub_arch::aarch64::reg::AArch64CoreRegs as CoreRegs;
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#[cfg(all(target_arch = "x86_64", feature = "guest_debug"))]
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#[cfg(all(target_arch = "x86_64", feature = "guest_debug"))]
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use gdbstub_arch::x86::reg::{X86SegmentRegs, X86_64CoreRegs as CoreRegs};
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use gdbstub_arch::x86::reg::{X86SegmentRegs, X86_64CoreRegs as CoreRegs};
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#[cfg(all(target_arch = "aarch64", feature = "guest_debug"))]
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use hypervisor::aarch64::StandardRegisters;
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#[cfg(all(target_arch = "x86_64", feature = "guest_debug"))]
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#[cfg(all(target_arch = "x86_64", feature = "guest_debug"))]
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use hypervisor::arch::x86::msr_index;
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use hypervisor::arch::x86::msr_index;
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#[cfg(target_arch = "x86_64")]
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#[cfg(target_arch = "x86_64")]
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@ -62,7 +60,7 @@ use hypervisor::kvm::{TdxExitDetails, TdxExitStatus};
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use hypervisor::CpuVendor;
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use hypervisor::CpuVendor;
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#[cfg(feature = "kvm")]
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#[cfg(feature = "kvm")]
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use hypervisor::HypervisorType;
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use hypervisor::HypervisorType;
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#[cfg(all(target_arch = "x86_64", feature = "guest_debug"))]
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#[cfg(feature = "guest_debug")]
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use hypervisor::StandardRegisters;
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use hypervisor::StandardRegisters;
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use hypervisor::{CpuState, HypervisorCpuError, VmExit, VmOps};
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use hypervisor::{CpuState, HypervisorCpuError, VmExit, VmOps};
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use libc::{c_void, siginfo_t};
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use libc::{c_void, siginfo_t};
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@ -2395,9 +2393,9 @@ impl Debuggable for CpuManager {
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.get_regs(cpu_id as u8)
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.get_regs(cpu_id as u8)
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.map_err(DebuggableError::ReadRegs)?;
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.map_err(DebuggableError::ReadRegs)?;
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Ok(CoreRegs {
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Ok(CoreRegs {
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x: gregs.regs.regs,
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x: gregs.get_regs(),
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sp: gregs.regs.sp,
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sp: gregs.get_sp(),
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pc: gregs.regs.pc,
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pc: gregs.get_pc(),
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..Default::default()
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..Default::default()
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})
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})
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}
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}
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@ -2465,9 +2463,9 @@ impl Debuggable for CpuManager {
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.get_regs(cpu_id as u8)
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.get_regs(cpu_id as u8)
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.map_err(DebuggableError::ReadRegs)?;
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.map_err(DebuggableError::ReadRegs)?;
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gregs.regs.regs = regs.x;
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gregs.set_regs(regs.x);
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gregs.regs.sp = regs.sp;
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gregs.set_sp(regs.sp);
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gregs.regs.pc = regs.pc;
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gregs.set_pc(regs.pc);
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self.set_regs(cpu_id as u8, &gregs)
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self.set_regs(cpu_id as u8, &gregs)
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.map_err(DebuggableError::WriteRegs)?;
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.map_err(DebuggableError::WriteRegs)?;
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@ -2924,8 +2922,8 @@ mod tests {
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use arch::{aarch64::regs, layout};
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use arch::{aarch64::regs, layout};
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use hypervisor::kvm::aarch64::is_system_register;
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use hypervisor::kvm::aarch64::is_system_register;
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use hypervisor::kvm::kvm_bindings::{
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use hypervisor::kvm::kvm_bindings::{
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kvm_regs, kvm_vcpu_init, user_pt_regs, KVM_REG_ARM64, KVM_REG_ARM64_SYSREG,
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kvm_vcpu_init, user_pt_regs, KVM_REG_ARM64, KVM_REG_ARM64_SYSREG, KVM_REG_ARM_CORE,
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KVM_REG_ARM_CORE, KVM_REG_SIZE_U64,
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KVM_REG_SIZE_U64,
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};
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};
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use hypervisor::{arm64_core_reg_id, offset_of};
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use hypervisor::{arm64_core_reg_id, offset_of};
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use std::mem;
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use std::mem;
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@ -2987,7 +2985,7 @@ mod tests {
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"Failed to get core register: Exec format error (os error 8)"
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"Failed to get core register: Exec format error (os error 8)"
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);
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);
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let mut state = kvm_regs::default();
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let mut state = vcpu.create_standard_regs();
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let res = vcpu.set_regs(&state);
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let res = vcpu.set_regs(&state);
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assert!(res.is_err());
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assert!(res.is_err());
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assert_eq!(
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assert_eq!(
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@ -2999,7 +2997,7 @@ mod tests {
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let res = vcpu.get_regs();
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let res = vcpu.get_regs();
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assert!(res.is_ok());
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assert!(res.is_ok());
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state = res.unwrap();
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state = res.unwrap();
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assert_eq!(state.regs.pstate, 0x3C5);
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assert_eq!(state.get_pstate(), 0x3C5);
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assert!(vcpu.set_regs(&state).is_ok());
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assert!(vcpu.set_regs(&state).is_ok());
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}
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}
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