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https://github.com/cloud-hypervisor/cloud-hypervisor.git
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hypervisor: emulator: emulate OR instruction
Signed-off-by: Wei Liu <liuwe@microsoft.com>
This commit is contained in:
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@ -12,6 +12,7 @@ use iced_x86::*;
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pub mod cmp;
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pub mod cmp;
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pub mod mov;
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pub mod mov;
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pub mod movs;
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pub mod movs;
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pub mod or;
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fn get_op<T: CpuStateManager>(
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fn get_op<T: CpuStateManager>(
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insn: &Instruction,
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insn: &Instruction,
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83
hypervisor/src/arch/x86/emulator/instructions/or.rs
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83
hypervisor/src/arch/x86/emulator/instructions/or.rs
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@ -0,0 +1,83 @@
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//
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// Copyright © 2021 Microsoft
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//
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// SPDX-License-Identifier: Apache-2.0
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//
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#![allow(non_camel_case_types)]
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//
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// OR - Logical inclusive OR
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//
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use crate::arch::emulator::{EmulationError, PlatformEmulator};
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use crate::arch::x86::emulator::instructions::*;
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use crate::arch::x86::Exception;
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macro_rules! or_rm_r {
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($bound:ty) => {
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fn emulate(
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&self,
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insn: &Instruction,
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state: &mut T,
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platform: &mut dyn PlatformEmulator<CpuState = T>,
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) -> Result<(), EmulationError<Exception>> {
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let src_reg_value = get_op(&insn, 1, std::mem::size_of::<$bound>(), state, platform)
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.map_err(EmulationError::PlatformEmulationError)?;
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let dst_value = get_op(&insn, 0, std::mem::size_of::<$bound>(), state, platform)
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.map_err(EmulationError::PlatformEmulationError)?;
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let result = src_reg_value | dst_value;
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set_op(
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&insn,
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0,
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std::mem::size_of::<$bound>(),
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state,
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platform,
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result,
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)
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.map_err(EmulationError::PlatformEmulationError)?;
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Ok(())
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}
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};
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}
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pub struct Or_rm8_r8;
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impl<T: CpuStateManager> InstructionHandler<T> for Or_rm8_r8 {
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or_rm_r!(u8);
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}
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#[cfg(test)]
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mod tests {
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#![allow(unused_mut)]
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use super::*;
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use crate::arch::x86::emulator::mock_vmm::*;
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#[test]
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// or byte ptr [rax+1h], sil
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fn test_or_rm8_r8() {
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let rax = 0;
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let insn = [0x40, 0x08, 0x70, 0x1];
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let cpu_id = 0;
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let ip: u64 = 0x1000;
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let sil = 0xaa;
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let memory = [0x0, 0x55];
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let mut vmm = MockVmm::new(
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ip,
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vec![(Register::SIL, sil), (Register::RAX, rax)],
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Some((0, &memory)),
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);
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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let mut out: [u8; 1] = [0; 1];
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vmm.read_memory(rax + 1, &mut out).unwrap();
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assert_eq!(u8::from_le_bytes(out), 0xff);
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}
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}
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@ -524,7 +524,9 @@ impl<'a, T: CpuStateManager> Emulator<'a, T> {
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(mov, Movzx_r32_rm16),
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(mov, Movzx_r32_rm16),
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(mov, Movzx_r64_rm16),
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(mov, Movzx_r64_rm16),
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// MOVS
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// MOVS
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(movs, Movsd_m32_m32)
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(movs, Movsd_m32_m32),
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// OR
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(or, Or_rm8_r8)
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);
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);
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handler
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handler
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