mirror of
https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2024-06-30 23:12:36 +00:00
hypervisor: Refactor core_registers on AArch64
On AArch64, the function `core_registers` and `set_core_registers` are the same thing of `get/set_regs` on x86_64. Now the names are aligned. This will benefit supporting `gdb`. Signed-off-by: Michael Zhao <michael.zhao@arm.com>
This commit is contained in:
Michael Zhao
Xin Wang
parent
fc2cc53d51
commit
c445513976
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@ -278,7 +278,6 @@ pub type Result<T> = anyhow::Result<T, HypervisorCpuError>;
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/// Trait to represent a generic Vcpu
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///
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pub trait Vcpu: Send + Sync {
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#[cfg(target_arch = "x86_64")]
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///
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/// Returns the vCPU general purpose registers.
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///
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@ -293,7 +292,6 @@ pub trait Vcpu: Send + Sync {
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/// Check if vcpu has attribute.
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///
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fn has_vcpu_attr(&self, attr: &DeviceAttr) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Sets the vCPU general purpose registers.
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///
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@ -428,16 +426,6 @@ pub trait Vcpu: Send + Sync {
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#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
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fn get_reg_list(&self, reg_list: &mut RegList) -> Result<()>;
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///
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/// Save the state of the core registers.
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///
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#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
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fn core_registers(&self, state: &mut StandardRegisters) -> Result<()>;
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///
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/// Restore the state of the core registers.
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///
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#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
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fn set_core_registers(&self, state: &StandardRegisters) -> Result<()>;
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///
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/// Save the state of the system registers.
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///
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#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
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@ -981,6 +981,103 @@ impl cpu::Vcpu for KvmVcpu {
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.get_regs()
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.map_err(|e| cpu::HypervisorCpuError::GetStandardRegs(e.into()))
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}
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///
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/// Returns the vCPU general purpose registers.
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/// The `KVM_GET_REGS` ioctl is not available on AArch64, `KVM_GET_ONE_REG`
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/// is used to get registers one by one.
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///
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#[cfg(target_arch = "aarch64")]
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fn get_regs(&self) -> cpu::Result<StandardRegisters> {
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let mut state: StandardRegisters = kvm_regs::default();
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let mut off = offset__of!(user_pt_regs, regs);
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// There are 31 user_pt_regs:
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// https://elixir.free-electrons.com/linux/v4.14.174/source/arch/arm64/include/uapi/asm/ptrace.h#L72
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// These actually are the general-purpose registers of the Armv8-a
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// architecture (i.e x0-x30 if used as a 64bit register or w0-30 when used as a 32bit register).
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for i in 0..31 {
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state.regs.regs[i] = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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off += std::mem::size_of::<u64>();
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}
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// We are now entering the "Other register" section of the ARMv8-a architecture.
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// First one, stack pointer.
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let off = offset__of!(user_pt_regs, sp);
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state.regs.sp = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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// Second one, the program counter.
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let off = offset__of!(user_pt_regs, pc);
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state.regs.pc = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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// Next is the processor state.
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let off = offset__of!(user_pt_regs, pstate);
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state.regs.pstate = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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// The stack pointer associated with EL1
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let off = offset__of!(kvm_regs, sp_el1);
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state.sp_el1 = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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// Exception Link Register for EL1, when taking an exception to EL1, this register
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// holds the address to which to return afterwards.
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let off = offset__of!(kvm_regs, elr_el1);
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state.elr_el1 = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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// Saved Program Status Registers, there are 5 of them used in the kernel.
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let mut off = offset__of!(kvm_regs, spsr);
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for i in 0..KVM_NR_SPSR as usize {
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state.spsr[i] = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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off += std::mem::size_of::<u64>();
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}
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// Now moving on to floting point registers which are stored in the user_fpsimd_state in the kernel:
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// https://elixir.free-electrons.com/linux/v4.9.62/source/arch/arm64/include/uapi/asm/kvm.h#L53
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let mut off = offset__of!(kvm_regs, fp_regs) + offset__of!(user_fpsimd_state, vregs);
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for i in 0..32 {
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state.fp_regs.vregs[i] = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U128, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?
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.into();
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off += mem::size_of::<u128>();
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}
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// Floating-point Status Register
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let off = offset__of!(kvm_regs, fp_regs) + offset__of!(user_fpsimd_state, fpsr);
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state.fp_regs.fpsr = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U32, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?
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as u32;
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// Floating-point Control Register
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let off = offset__of!(kvm_regs, fp_regs) + offset__of!(user_fpsimd_state, fpcr);
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state.fp_regs.fpcr = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U32, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?
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as u32;
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Ok(state)
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}
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#[cfg(target_arch = "x86_64")]
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///
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/// Sets the vCPU general purpose registers using the `KVM_SET_REGS` ioctl.
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@ -991,6 +1088,88 @@ impl cpu::Vcpu for KvmVcpu {
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.map_err(|e| cpu::HypervisorCpuError::SetStandardRegs(e.into()))
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}
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///
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/// Sets the vCPU general purpose registers.
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/// The `KVM_SET_REGS` ioctl is not available on AArch64, `KVM_SET_ONE_REG`
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/// is used to set registers one by one.
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///
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#[cfg(target_arch = "aarch64")]
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fn set_regs(&self, state: &StandardRegisters) -> cpu::Result<()> {
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// The function follows the exact identical order from `state`. Look there
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// for some additional info on registers.
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let mut off = offset__of!(user_pt_regs, regs);
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for i in 0..31 {
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self.fd
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.set_one_reg(
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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state.regs.regs[i],
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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off += std::mem::size_of::<u64>();
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}
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let off = offset__of!(user_pt_regs, sp);
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self.fd
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.set_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), state.regs.sp)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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let off = offset__of!(user_pt_regs, pc);
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self.fd
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.set_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), state.regs.pc)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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let off = offset__of!(user_pt_regs, pstate);
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self.fd
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.set_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), state.regs.pstate)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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let off = offset__of!(kvm_regs, sp_el1);
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self.fd
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.set_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), state.sp_el1)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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let off = offset__of!(kvm_regs, elr_el1);
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self.fd
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.set_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), state.elr_el1)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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let mut off = offset__of!(kvm_regs, spsr);
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for i in 0..KVM_NR_SPSR as usize {
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self.fd
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.set_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), state.spsr[i])
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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off += std::mem::size_of::<u64>();
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}
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let mut off = offset__of!(kvm_regs, fp_regs) + offset__of!(user_fpsimd_state, vregs);
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for i in 0..32 {
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self.fd
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.set_one_reg(
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arm64_core_reg_id!(KVM_REG_SIZE_U128, off),
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state.fp_regs.vregs[i] as u64,
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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off += mem::size_of::<u128>();
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}
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let off = offset__of!(kvm_regs, fp_regs) + offset__of!(user_fpsimd_state, fpsr);
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self.fd
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.set_one_reg(
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arm64_core_reg_id!(KVM_REG_SIZE_U32, off),
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state.fp_regs.fpsr as u64,
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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let off = offset__of!(kvm_regs, fp_regs) + offset__of!(user_fpsimd_state, fpcr);
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self.fd
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.set_one_reg(
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arm64_core_reg_id!(KVM_REG_SIZE_U32, off),
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state.fp_regs.fpcr as u64,
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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Ok(())
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}
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#[cfg(target_arch = "aarch64")]
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///
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/// Set attribute for vcpu.
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@ -1391,179 +1570,6 @@ impl cpu::Vcpu for KvmVcpu {
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.map_err(|e| cpu::HypervisorCpuError::GetRegList(e.into()))
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}
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///
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/// Save the state of the core registers.
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///
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#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
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fn core_registers(&self, state: &mut StandardRegisters) -> cpu::Result<()> {
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let mut off = offset__of!(user_pt_regs, regs);
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// There are 31 user_pt_regs:
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// https://elixir.free-electrons.com/linux/v4.14.174/source/arch/arm64/include/uapi/asm/ptrace.h#L72
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// These actually are the general-purpose registers of the Armv8-a
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// architecture (i.e x0-x30 if used as a 64bit register or w0-30 when used as a 32bit register).
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for i in 0..31 {
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state.regs.regs[i] = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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off += std::mem::size_of::<u64>();
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}
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// We are now entering the "Other register" section of the ARMv8-a architecture.
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// First one, stack pointer.
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let off = offset__of!(user_pt_regs, sp);
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state.regs.sp = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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// Second one, the program counter.
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let off = offset__of!(user_pt_regs, pc);
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state.regs.pc = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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// Next is the processor state.
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let off = offset__of!(user_pt_regs, pstate);
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state.regs.pstate = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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// The stack pointer associated with EL1
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let off = offset__of!(kvm_regs, sp_el1);
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state.sp_el1 = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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// Exception Link Register for EL1, when taking an exception to EL1, this register
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// holds the address to which to return afterwards.
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let off = offset__of!(kvm_regs, elr_el1);
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state.elr_el1 = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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// Saved Program Status Registers, there are 5 of them used in the kernel.
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let mut off = offset__of!(kvm_regs, spsr);
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for i in 0..KVM_NR_SPSR as usize {
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state.spsr[i] = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?;
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off += std::mem::size_of::<u64>();
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}
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// Now moving on to floting point registers which are stored in the user_fpsimd_state in the kernel:
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// https://elixir.free-electrons.com/linux/v4.9.62/source/arch/arm64/include/uapi/asm/kvm.h#L53
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let mut off = offset__of!(kvm_regs, fp_regs) + offset__of!(user_fpsimd_state, vregs);
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for i in 0..32 {
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state.fp_regs.vregs[i] = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U128, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?
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.into();
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off += mem::size_of::<u128>();
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}
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// Floating-point Status Register
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let off = offset__of!(kvm_regs, fp_regs) + offset__of!(user_fpsimd_state, fpsr);
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state.fp_regs.fpsr = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U32, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?
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as u32;
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// Floating-point Control Register
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let off = offset__of!(kvm_regs, fp_regs) + offset__of!(user_fpsimd_state, fpcr);
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state.fp_regs.fpcr = self
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.fd
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.get_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U32, off))
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.map_err(|e| cpu::HypervisorCpuError::GetCoreRegister(e.into()))?
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as u32;
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Ok(())
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}
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///
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/// Restore the state of the core registers.
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///
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#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
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fn set_core_registers(&self, state: &StandardRegisters) -> cpu::Result<()> {
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// The function follows the exact identical order from `state`. Look there
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// for some additional info on registers.
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let mut off = offset__of!(user_pt_regs, regs);
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for i in 0..31 {
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self.fd
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.set_one_reg(
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arm64_core_reg_id!(KVM_REG_SIZE_U64, off),
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state.regs.regs[i],
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)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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off += std::mem::size_of::<u64>();
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}
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let off = offset__of!(user_pt_regs, sp);
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self.fd
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.set_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), state.regs.sp)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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let off = offset__of!(user_pt_regs, pc);
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self.fd
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.set_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), state.regs.pc)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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let off = offset__of!(user_pt_regs, pstate);
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self.fd
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.set_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), state.regs.pstate)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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let off = offset__of!(kvm_regs, sp_el1);
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self.fd
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.set_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), state.sp_el1)
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.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
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let off = offset__of!(kvm_regs, elr_el1);
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self.fd
|
||||
.set_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), state.elr_el1)
|
||||
.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
|
||||
|
||||
let mut off = offset__of!(kvm_regs, spsr);
|
||||
for i in 0..KVM_NR_SPSR as usize {
|
||||
self.fd
|
||||
.set_one_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off), state.spsr[i])
|
||||
.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
|
||||
off += std::mem::size_of::<u64>();
|
||||
}
|
||||
|
||||
let mut off = offset__of!(kvm_regs, fp_regs) + offset__of!(user_fpsimd_state, vregs);
|
||||
for i in 0..32 {
|
||||
self.fd
|
||||
.set_one_reg(
|
||||
arm64_core_reg_id!(KVM_REG_SIZE_U128, off),
|
||||
state.fp_regs.vregs[i] as u64,
|
||||
)
|
||||
.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
|
||||
off += mem::size_of::<u128>();
|
||||
}
|
||||
|
||||
let off = offset__of!(kvm_regs, fp_regs) + offset__of!(user_fpsimd_state, fpsr);
|
||||
self.fd
|
||||
.set_one_reg(
|
||||
arm64_core_reg_id!(KVM_REG_SIZE_U32, off),
|
||||
state.fp_regs.fpsr as u64,
|
||||
)
|
||||
.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
|
||||
|
||||
let off = offset__of!(kvm_regs, fp_regs) + offset__of!(user_fpsimd_state, fpcr);
|
||||
self.fd
|
||||
.set_one_reg(
|
||||
arm64_core_reg_id!(KVM_REG_SIZE_U32, off),
|
||||
state.fp_regs.fpcr as u64,
|
||||
)
|
||||
.map_err(|e| cpu::HypervisorCpuError::SetCoreRegister(e.into()))?;
|
||||
Ok(())
|
||||
}
|
||||
///
|
||||
/// Save the state of the system registers.
|
||||
///
|
||||
#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
|
||||
|
|
@ -1804,7 +1810,7 @@ impl cpu::Vcpu for KvmVcpu {
|
|||
mpidr: self.read_mpidr()?,
|
||||
..Default::default()
|
||||
};
|
||||
self.core_registers(&mut state.core_regs)?;
|
||||
state.core_regs = self.get_regs()?;
|
||||
self.system_registers(&mut state.sys_regs)?;
|
||||
|
||||
Ok(state)
|
||||
|
|
@ -1898,7 +1904,7 @@ impl cpu::Vcpu for KvmVcpu {
|
|||
///
|
||||
#[cfg(target_arch = "aarch64")]
|
||||
fn set_state(&self, state: &CpuState) -> cpu::Result<()> {
|
||||
self.set_core_registers(&state.core_regs)?;
|
||||
self.set_regs(&state.core_regs)?;
|
||||
self.set_system_registers(&state.sys_regs)?;
|
||||
self.set_mp_state(state.mp_state)?;
|
||||
|
||||
|
|
|
|||
|
|
@ -2498,15 +2498,15 @@ mod tests {
|
|||
vm.get_preferred_target(&mut kvi).unwrap();
|
||||
|
||||
// Must fail when vcpu is not initialized yet.
|
||||
let mut state = kvm_regs::default();
|
||||
let res = vcpu.core_registers(&mut state);
|
||||
let res = vcpu.get_regs();
|
||||
assert!(res.is_err());
|
||||
assert_eq!(
|
||||
format!("{}", res.unwrap_err()),
|
||||
"Failed to get core register: Exec format error (os error 8)"
|
||||
);
|
||||
|
||||
let res = vcpu.set_core_registers(&state);
|
||||
let mut state = kvm_regs::default();
|
||||
let res = vcpu.set_regs(&state);
|
||||
assert!(res.is_err());
|
||||
assert_eq!(
|
||||
format!("{}", res.unwrap_err()),
|
||||
|
|
@ -2514,10 +2514,12 @@ mod tests {
|
|||
);
|
||||
|
||||
vcpu.vcpu_init(&kvi).unwrap();
|
||||
assert!(vcpu.core_registers(&mut state).is_ok());
|
||||
let res = vcpu.get_regs();
|
||||
assert!(res.is_ok());
|
||||
state = res.unwrap();
|
||||
assert_eq!(state.regs.pstate, 0x3C5);
|
||||
|
||||
assert!(vcpu.set_core_registers(&state).is_ok());
|
||||
assert!(vcpu.set_regs(&state).is_ok());
|
||||
let off = offset__of!(user_pt_regs, pstate);
|
||||
let pstate = vcpu
|
||||
.get_reg(arm64_core_reg_id!(KVM_REG_SIZE_U64, off))
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user