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acpi_tables: Address Rust 1.51.0 clippy issue (upper_case_acronyms)

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error: name `SDT` contains a capitalized acronym
  --> acpi_tables/src/sdt.rs:27:12
   |
27 | pub struct SDT {
   |            ^^^ help: consider making the acronym lowercase, except the initial letter: `Sdt`
   |
   = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#upper_case_acronyms

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
This commit is contained in:
Rob Bradford 2021-03-25 15:57:27 +00:00
parent 030d6046b2
commit db6516931d
7 changed files with 64 additions and 64 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

50
acpi_tables/src/aml.rs
View File

@ -239,11 +239,11 @@ fn create_pkg_length(data: &[u8], include_self: bool) -> Vec<u8> {
result result
} }
pub struct EISAName { pub struct EisaName {
value: DWord, value: DWord,
} }
impl EISAName { impl EisaName {
pub fn new(name: &str) -> Self { pub fn new(name: &str) -> Self {
assert_eq!(name.len(), 7); assert_eq!(name.len(), 7);
@ -258,11 +258,11 @@ impl EISAName {
| name.chars().nth(6).unwrap().to_digit(16).unwrap()) | name.chars().nth(6).unwrap().to_digit(16).unwrap())
.swap_bytes(); .swap_bytes();
EISAName { value } EisaName { value }
} }
} }
impl Aml for EISAName { impl Aml for EisaName {
fn to_aml_bytes(&self) -> Vec<u8> { fn to_aml_bytes(&self) -> Vec<u8> {
self.value.to_aml_bytes() self.value.to_aml_bytes()
} }
@ -390,7 +390,7 @@ impl Aml for Memory32Fixed {
#[derive(Copy, Clone)] #[derive(Copy, Clone)]
enum AddressSpaceType { enum AddressSpaceType {
Memory, Memory,
IO, Io,
BusNumber, BusNumber,
} }
@ -421,7 +421,7 @@ impl<T> AddressSpace<T> {
pub fn new_io(min: T, max: T) -> Self { pub fn new_io(min: T, max: T) -> Self {
AddressSpace { AddressSpace {
r#type: AddressSpaceType::IO, r#type: AddressSpaceType::Io,
min, min,
max, max,
type_flags: 3, /* EntireRange */ type_flags: 3, /* EntireRange */
@ -510,16 +510,16 @@ impl Aml for AddressSpace<u64> {
} }
} }
pub struct IO { pub struct Io {
min: u16, min: u16,
max: u16, max: u16,
alignment: u8, alignment: u8,
length: u8, length: u8,
} }
impl IO { impl Io {
pub fn new(min: u16, max: u16, alignment: u8, length: u8) -> Self { pub fn new(min: u16, max: u16, alignment: u8, length: u8) -> Self {
IO { Io {
min, min,
max, max,
alignment, alignment,
@ -528,7 +528,7 @@ impl IO {
} }
} }
impl Aml for IO { impl Aml for Io {
fn to_aml_bytes(&self) -> Vec<u8> { fn to_aml_bytes(&self) -> Vec<u8> {
let mut bytes = Vec::new(); let mut bytes = Vec::new();
@ -788,14 +788,14 @@ impl Aml for Field {
#[derive(Clone, Copy)] #[derive(Clone, Copy)]
pub enum OpRegionSpace { pub enum OpRegionSpace {
SystemMemory, SystemMemory,
SystemIO, SystemIo,
PCIConfig, PConfig,
EmbeddedControl, EmbeddedControl,
SMBus, Smbus,
SystemCMOS, SystemCmos,
PciBarTarget, PciBarTarget,
IPMI, Ipmi,
GeneralPurposeIO, GeneralPurposeIo,
GenericSerialBus, GenericSerialBus,
} }
@ -1235,12 +1235,12 @@ mod tests {
Device::new( Device::new(
"_SB_.COM1".into(), "_SB_.COM1".into(),
vec![ vec![
&Name::new("_HID".into(), &EISAName::new("PNP0501")), &Name::new("_HID".into(), &EisaName::new("PNP0501")),
&Name::new( &Name::new(
"_CRS".into(), "_CRS".into(),
&ResourceTemplate::new(vec![ &ResourceTemplate::new(vec![
&Interrupt::new(true, true, false, false, 4), &Interrupt::new(true, true, false, false, 4),
&IO::new(0x3f8, 0x3f8, 0, 0x8) &Io::new(0x3f8, 0x3f8, 0, 0x8)
]) ])
) )
] ]
@ -1476,7 +1476,7 @@ mod tests {
"_CRS".into(), "_CRS".into(),
&ResourceTemplate::new(vec![ &ResourceTemplate::new(vec![
&Interrupt::new(true, true, false, false, 4), &Interrupt::new(true, true, false, false, 4),
&IO::new(0x3f8, 0x3f8, 0, 0x8) &Io::new(0x3f8, 0x3f8, 0, 0x8)
]) ])
) )
.to_aml_bytes(), .to_aml_bytes(),
@ -1519,7 +1519,7 @@ mod tests {
#[test] #[test]
fn test_eisa_name() { fn test_eisa_name() {
assert_eq!( assert_eq!(
Name::new("_HID".into(), &EISAName::new("PNP0501")).to_aml_bytes(), Name::new("_HID".into(), &EisaName::new("PNP0501")).to_aml_bytes(),
[0x08, 0x5F, 0x48, 0x49, 0x44, 0x0C, 0x41, 0xD0, 0x05, 0x01], [0x08, 0x5F, 0x48, 0x49, 0x44, 0x0C, 0x41, 0xD0, 0x05, 0x01],
) )
} }
@ -1665,14 +1665,14 @@ mod tests {
#[test] #[test]
fn test_op_region() { fn test_op_region() {
/* /*
OperationRegion (PRST, SystemIO, 0x0CD8, 0x0C) OperationRegion (PRST, SystemIo, 0x0CD8, 0x0C)
*/ */
let op_region_data = [ let op_region_data = [
0x5Bu8, 0x80, 0x50, 0x52, 0x53, 0x54, 0x01, 0x0B, 0xD8, 0x0C, 0x0A, 0x0C, 0x5Bu8, 0x80, 0x50, 0x52, 0x53, 0x54, 0x01, 0x0B, 0xD8, 0x0C, 0x0A, 0x0C,
]; ];
assert_eq!( assert_eq!(
OpRegion::new("PRST".into(), OpRegionSpace::SystemIO, 0xcd8, 0xc).to_aml_bytes(), OpRegion::new("PRST".into(), OpRegionSpace::SystemIo, 0xcd8, 0xc).to_aml_bytes(),
&op_region_data[..] &op_region_data[..]
); );
} }
@ -1766,7 +1766,7 @@ mod tests {
Device::new( Device::new(
"_SB_.MHPC".into(), "_SB_.MHPC".into(),
vec![ vec![
&Name::new("_HID".into(), &EISAName::new("PNP0A06")), &Name::new("_HID".into(), &EisaName::new("PNP0A06")),
&mutex, &mutex,
&Method::new( &Method::new(
"TEST".into(), "TEST".into(),
@ -1807,7 +1807,7 @@ mod tests {
Device::new( Device::new(
"_SB_.MHPC".into(), "_SB_.MHPC".into(),
vec![ vec![
&Name::new("_HID".into(), &EISAName::new("PNP0A06")), &Name::new("_HID".into(), &EisaName::new("PNP0A06")),
&Method::new( &Method::new(
"TEST".into(), "TEST".into(),
0, 0,
@ -1848,7 +1848,7 @@ mod tests {
Device::new( Device::new(
"_SB_.MHPC".into(), "_SB_.MHPC".into(),
vec![ vec![
&Name::new("_HID".into(), &EISAName::new("PNP0A06")), &Name::new("_HID".into(), &EisaName::new("PNP0A06")),
&Method::new( &Method::new(
"TEST".into(), "TEST".into(),
0, 0,

16
acpi_tables/src/rsdp.rs
View File

@ -7,7 +7,7 @@ use vm_memory::ByteValued;
#[repr(packed)] #[repr(packed)]
#[derive(Clone, Copy, Default)] #[derive(Clone, Copy, Default)]
pub struct RSDP { pub struct Rsdp {
pub signature: [u8; 8], pub signature: [u8; 8],
pub checksum: u8, pub checksum: u8,
pub oem_id: [u8; 6], pub oem_id: [u8; 6],
@ -19,17 +19,17 @@ pub struct RSDP {
_reserved: [u8; 3], _reserved: [u8; 3],
} }
unsafe impl ByteValued for RSDP {} unsafe impl ByteValued for Rsdp {}
impl RSDP { impl Rsdp {
pub fn new(oem_id: [u8; 6], xsdt_addr: u64) -> Self { pub fn new(oem_id: [u8; 6], xsdt_addr: u64) -> Self {
let mut rsdp = RSDP { let mut rsdp = Rsdp {
signature: *b"RSD PTR ", signature: *b"RSD PTR ",
checksum: 0, checksum: 0,
oem_id, oem_id,
revision: 2, revision: 2,
_rsdt_addr: 0, _rsdt_addr: 0,
length: std::mem::size_of::<RSDP>() as u32, length: std::mem::size_of::<Rsdp>() as u32,
xsdt_addr, xsdt_addr,
extended_checksum: 0, extended_checksum: 0,
_reserved: [0; 3], _reserved: [0; 3],
@ -41,18 +41,18 @@ impl RSDP {
} }
pub fn len() -> usize { pub fn len() -> usize {
std::mem::size_of::<RSDP>() std::mem::size_of::<Rsdp>()
} }
} }
#[cfg(test)] #[cfg(test)]
mod tests { mod tests {
use super::RSDP; use super::Rsdp;
use vm_memory::bytes::ByteValued; use vm_memory::bytes::ByteValued;
#[test] #[test]
fn test_rsdp() { fn test_rsdp() {
let rsdp = RSDP::new(*b"CHYPER", 0xdead_beef); let rsdp = Rsdp::new(*b"CHYPER", 0xdead_beef);
let sum = rsdp let sum = rsdp
.as_slice() .as_slice()
.iter() .iter()

10
acpi_tables/src/sdt.rs
View File

@ -24,12 +24,12 @@ impl GenericAddress {
} }
} }
pub struct SDT { pub struct Sdt {
data: Vec<u8>, data: Vec<u8>,
} }
#[allow(clippy::len_without_is_empty)] #[allow(clippy::len_without_is_empty)]
impl SDT { impl Sdt {
pub fn new( pub fn new(
signature: [u8; 4], signature: [u8; 4],
length: u32, length: u32,
@ -53,7 +53,7 @@ impl SDT {
assert_eq!(data.len(), 36); assert_eq!(data.len(), 36);
data.resize(length as usize, 0); data.resize(length as usize, 0);
let mut sdt = SDT { data }; let mut sdt = Sdt { data };
sdt.update_checksum(); sdt.update_checksum();
sdt sdt
@ -117,11 +117,11 @@ impl SDT {
#[cfg(test)] #[cfg(test)]
mod tests { mod tests {
use super::SDT; use super::Sdt;
#[test] #[test]
fn test_sdt() { fn test_sdt() {
let mut sdt = SDT::new(*b"TEST", 40, 1, *b"CLOUDH", *b"TESTTEST", 1); let mut sdt = Sdt::new(*b"TEST", 40, 1, *b"CLOUDH", *b"TESTTEST", 1);
let sum: u8 = sdt let sum: u8 = sdt
.as_slice() .as_slice()
.iter() .iter()

20
vmm/src/acpi.rs
View File

@ -8,7 +8,7 @@ use crate::memory_manager::MemoryManager;
use crate::vm::NumaNodes; use crate::vm::NumaNodes;
#[cfg(target_arch = "x86_64")] #[cfg(target_arch = "x86_64")]
use acpi_tables::sdt::GenericAddress; use acpi_tables::sdt::GenericAddress;
use acpi_tables::{aml::Aml, rsdp::RSDP, sdt::SDT}; use acpi_tables::{aml::Aml, rsdp::Rsdp, sdt::Sdt};
use bitflags::bitflags; use bitflags::bitflags;
use std::sync::{Arc, Mutex}; use std::sync::{Arc, Mutex};
@ -94,9 +94,9 @@ pub fn create_dsdt_table(
device_manager: &Arc<Mutex<DeviceManager>>, device_manager: &Arc<Mutex<DeviceManager>>,
cpu_manager: &Arc<Mutex<CpuManager>>, cpu_manager: &Arc<Mutex<CpuManager>>,
memory_manager: &Arc<Mutex<MemoryManager>>, memory_manager: &Arc<Mutex<MemoryManager>>,
) -> SDT { ) -> Sdt {
// DSDT // DSDT
let mut dsdt = SDT::new(*b"DSDT", 36, 6, *b"CLOUDH", *b"CHDSDT ", 1); let mut dsdt = Sdt::new(*b"DSDT", 36, 6, *b"CLOUDH", *b"CHDSDT ", 1);
dsdt.append_slice(device_manager.lock().unwrap().to_aml_bytes().as_slice()); dsdt.append_slice(device_manager.lock().unwrap().to_aml_bytes().as_slice());
dsdt.append_slice(cpu_manager.lock().unwrap().to_aml_bytes().as_slice()); dsdt.append_slice(cpu_manager.lock().unwrap().to_aml_bytes().as_slice());
@ -126,14 +126,14 @@ pub fn create_acpi_tables(
// DSDT // DSDT
let dsdt = create_dsdt_table(device_manager, cpu_manager, memory_manager); let dsdt = create_dsdt_table(device_manager, cpu_manager, memory_manager);
let dsdt_offset = rsdp_offset.checked_add(RSDP::len() as u64).unwrap(); let dsdt_offset = rsdp_offset.checked_add(Rsdp::len() as u64).unwrap();
guest_mem guest_mem
.write_slice(dsdt.as_slice(), dsdt_offset) .write_slice(dsdt.as_slice(), dsdt_offset)
.expect("Error writing DSDT table"); .expect("Error writing DSDT table");
// FACP aka FADT // FACP aka FADT
// Revision 6 of the ACPI FADT table is 276 bytes long // Revision 6 of the ACPI FADT table is 276 bytes long
let mut facp = SDT::new(*b"FACP", 276, 6, *b"CLOUDH", *b"CHFACP ", 1); let mut facp = Sdt::new(*b"FACP", 276, 6, *b"CLOUDH", *b"CHFACP ", 1);
// PM_TMR_BLK I/O port // PM_TMR_BLK I/O port
#[cfg(target_arch = "x86_64")] #[cfg(target_arch = "x86_64")]
@ -182,7 +182,7 @@ pub fn create_acpi_tables(
tables.push(madt_offset.0); tables.push(madt_offset.0);
// MCFG // MCFG
let mut mcfg = SDT::new(*b"MCFG", 36, 1, *b"CLOUDH", *b"CHMCFG ", 1); let mut mcfg = Sdt::new(*b"MCFG", 36, 1, *b"CLOUDH", *b"CHMCFG ", 1);
// MCFG reserved 8 bytes // MCFG reserved 8 bytes
mcfg.append(0u64); mcfg.append(0u64);
@ -208,7 +208,7 @@ pub fn create_acpi_tables(
(mcfg.len(), mcfg_offset) (mcfg.len(), mcfg_offset)
} else { } else {
// SRAT // SRAT
let mut srat = SDT::new(*b"SRAT", 36, 3, *b"CLOUDH", *b"CHSRAT ", 1); let mut srat = Sdt::new(*b"SRAT", 36, 3, *b"CLOUDH", *b"CHSRAT ", 1);
// SRAT reserved 12 bytes // SRAT reserved 12 bytes
srat.append_slice(&[0u8; 12]); srat.append_slice(&[0u8; 12]);
@ -262,7 +262,7 @@ pub fn create_acpi_tables(
tables.push(srat_offset.0); tables.push(srat_offset.0);
// SLIT // SLIT
let mut slit = SDT::new(*b"SLIT", 36, 1, *b"CLOUDH", *b"CHSLIT ", 1); let mut slit = Sdt::new(*b"SLIT", 36, 1, *b"CLOUDH", *b"CHSLIT ", 1);
// Number of System Localities on 8 bytes. // Number of System Localities on 8 bytes.
slit.append(numa_nodes.len() as u64); slit.append(numa_nodes.len() as u64);
@ -292,7 +292,7 @@ pub fn create_acpi_tables(
}; };
// XSDT // XSDT
let mut xsdt = SDT::new(*b"XSDT", 36, 1, *b"CLOUDH", *b"CHXSDT ", 1); let mut xsdt = Sdt::new(*b"XSDT", 36, 1, *b"CLOUDH", *b"CHXSDT ", 1);
for table in tables { for table in tables {
xsdt.append(table); xsdt.append(table);
} }
@ -304,7 +304,7 @@ pub fn create_acpi_tables(
.expect("Error writing XSDT table"); .expect("Error writing XSDT table");
// RSDP // RSDP
let rsdp = RSDP::new(*b"CLOUDH", xsdt_offset.0); let rsdp = Rsdp::new(*b"CLOUDH", xsdt_offset.0);
guest_mem guest_mem
.write_slice(rsdp.as_slice(), rsdp_offset) .write_slice(rsdp.as_slice(), rsdp_offset)
.expect("Error writing RSDP"); .expect("Error writing RSDP");

10
vmm/src/cpu.rs
View File

@ -21,7 +21,7 @@ use crate::seccomp_filters::{get_seccomp_filter, Thread};
use crate::vm::physical_bits; use crate::vm::physical_bits;
use crate::CPU_MANAGER_SNAPSHOT_ID; use crate::CPU_MANAGER_SNAPSHOT_ID;
#[cfg(feature = "acpi")] #[cfg(feature = "acpi")]
use acpi_tables::{aml, aml::Aml, sdt::SDT}; use acpi_tables::{aml, aml::Aml, sdt::Sdt};
use anyhow::anyhow; use anyhow::anyhow;
#[cfg(target_arch = "x86_64")] #[cfg(target_arch = "x86_64")]
use arch::x86_64::SgxEpcSection; use arch::x86_64::SgxEpcSection;
@ -1134,11 +1134,11 @@ impl CpuManager {
} }
#[cfg(feature = "acpi")] #[cfg(feature = "acpi")]
pub fn create_madt(&self) -> SDT { pub fn create_madt(&self) -> Sdt {
// This is also checked in the commandline parsing. // This is also checked in the commandline parsing.
assert!(self.config.boot_vcpus <= self.config.max_vcpus); assert!(self.config.boot_vcpus <= self.config.max_vcpus);
let mut madt = SDT::new(*b"APIC", 44, 5, *b"CLOUDH", *b"CHMADT ", 1); let mut madt = Sdt::new(*b"APIC", 44, 5, *b"CLOUDH", *b"CHMADT ", 1);
#[cfg(target_arch = "x86_64")] #[cfg(target_arch = "x86_64")]
{ {
madt.write(36, arch::layout::APIC_START); madt.write(36, arch::layout::APIC_START);
@ -1402,7 +1402,7 @@ impl Aml for CpuManager {
&aml::Device::new( &aml::Device::new(
"_SB_.PRES".into(), "_SB_.PRES".into(),
vec![ vec![
&aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0A06")), &aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0A06")),
&aml::Name::new("_UID".into(), &"CPU Hotplug Controller"), &aml::Name::new("_UID".into(), &"CPU Hotplug Controller"),
// Mutex to protect concurrent access as we write to choose CPU and then read back status // Mutex to protect concurrent access as we write to choose CPU and then read back status
&aml::Mutex::new("CPLK".into(), 0), &aml::Mutex::new("CPLK".into(), 0),
@ -1453,7 +1453,7 @@ impl Aml for CpuManager {
// CPU devices // CPU devices
let hid = aml::Name::new("_HID".into(), &"ACPI0010"); let hid = aml::Name::new("_HID".into(), &"ACPI0010");
let uid = aml::Name::new("_CID".into(), &aml::EISAName::new("PNP0A05")); let uid = aml::Name::new("_CID".into(), &aml::EisaName::new("PNP0A05"));
// Bundle methods together under a common object // Bundle methods together under a common object
let methods = CPUMethods { let methods = CPUMethods {
max_vcpus: self.config.max_vcpus, max_vcpus: self.config.max_vcpus,

16
vmm/src/device_manager.rs
View File

@ -3671,7 +3671,7 @@ impl Aml for DeviceManager {
&aml::Device::new( &aml::Device::new(
"_SB_.PHPR".into(), "_SB_.PHPR".into(),
vec![ vec![
&aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0A06")), &aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0A06")),
&aml::Name::new("_STA".into(), &0x0bu8), &aml::Name::new("_STA".into(), &0x0bu8),
&aml::Name::new("_UID".into(), &"PCI Hotplug Controller"), &aml::Name::new("_UID".into(), &"PCI Hotplug Controller"),
&aml::Mutex::new("BLCK".into(), 0), &aml::Mutex::new("BLCK".into(), 0),
@ -3725,9 +3725,9 @@ impl Aml for DeviceManager {
let end_of_device_area = self.memory_manager.lock().unwrap().end_of_device_area().0; let end_of_device_area = self.memory_manager.lock().unwrap().end_of_device_area().0;
let mut pci_dsdt_inner_data: Vec<&dyn aml::Aml> = Vec::new(); let mut pci_dsdt_inner_data: Vec<&dyn aml::Aml> = Vec::new();
let hid = aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0A08")); let hid = aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0A08"));
pci_dsdt_inner_data.push(&hid); pci_dsdt_inner_data.push(&hid);
let cid = aml::Name::new("_CID".into(), &aml::EISAName::new("PNP0A03")); let cid = aml::Name::new("_CID".into(), &aml::EisaName::new("PNP0A03"));
pci_dsdt_inner_data.push(&cid); pci_dsdt_inner_data.push(&cid);
let adr = aml::Name::new("_ADR".into(), &aml::ZERO); let adr = aml::Name::new("_ADR".into(), &aml::ZERO);
pci_dsdt_inner_data.push(&adr); pci_dsdt_inner_data.push(&adr);
@ -3741,7 +3741,7 @@ impl Aml for DeviceManager {
"_CRS".into(), "_CRS".into(),
&aml::ResourceTemplate::new(vec![ &aml::ResourceTemplate::new(vec![
&aml::AddressSpace::new_bus_number(0x0u16, 0xffu16), &aml::AddressSpace::new_bus_number(0x0u16, 0xffu16),
&aml::IO::new(0xcf8, 0xcf8, 1, 0x8), &aml::Io::new(0xcf8, 0xcf8, 1, 0x8),
&aml::AddressSpace::new_memory( &aml::AddressSpace::new_memory(
aml::AddressSpaceCachable::NotCacheable, aml::AddressSpaceCachable::NotCacheable,
true, true,
@ -3794,7 +3794,7 @@ impl Aml for DeviceManager {
let mbrd_dsdt_data = aml::Device::new( let mbrd_dsdt_data = aml::Device::new(
"_SB_.MBRD".into(), "_SB_.MBRD".into(),
vec![ vec![
&aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0C02")), &aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0C02")),
&aml::Name::new("_UID".into(), &aml::ZERO), &aml::Name::new("_UID".into(), &aml::ZERO),
&aml::Name::new( &aml::Name::new(
"_CRS".into(), "_CRS".into(),
@ -3811,13 +3811,13 @@ impl Aml for DeviceManager {
let com1_dsdt_data = aml::Device::new( let com1_dsdt_data = aml::Device::new(
"_SB_.COM1".into(), "_SB_.COM1".into(),
vec![ vec![
&aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0501")), &aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0501")),
&aml::Name::new("_UID".into(), &aml::ZERO), &aml::Name::new("_UID".into(), &aml::ZERO),
&aml::Name::new( &aml::Name::new(
"_CRS".into(), "_CRS".into(),
&aml::ResourceTemplate::new(vec![ &aml::ResourceTemplate::new(vec![
&aml::Interrupt::new(true, true, false, false, 4), &aml::Interrupt::new(true, true, false, false, 4),
&aml::IO::new(0x3f8, 0x3f8, 0, 0x8), &aml::Io::new(0x3f8, 0x3f8, 0, 0x8),
]), ]),
), ),
], ],
@ -3830,7 +3830,7 @@ impl Aml for DeviceManager {
let power_button_dsdt_data = aml::Device::new( let power_button_dsdt_data = aml::Device::new(
"_SB_.PWRB".into(), "_SB_.PWRB".into(),
vec![ vec![
&aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0C0C")), &aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0C0C")),
&aml::Name::new("_UID".into(), &aml::ZERO), &aml::Name::new("_UID".into(), &aml::ZERO),
], ],
) )

6
vmm/src/memory_manager.rs
View File

@ -1599,7 +1599,7 @@ impl Aml for MemorySlot {
aml::Device::new( aml::Device::new(
format!("M{:03}", self.slot_id).as_str().into(), format!("M{:03}", self.slot_id).as_str().into(),
vec![ vec![
&aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0C80")), &aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0C80")),
&aml::Name::new("_UID".into(), &self.slot_id), &aml::Name::new("_UID".into(), &self.slot_id),
/* /*
_STA return value: _STA return value:
@ -1836,7 +1836,7 @@ impl Aml for MemoryManager {
&aml::Device::new( &aml::Device::new(
"_SB_.MHPC".into(), "_SB_.MHPC".into(),
vec![ vec![
&aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0A06")), &aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0A06")),
&aml::Name::new("_UID".into(), &"Memory Hotplug Controller"), &aml::Name::new("_UID".into(), &"Memory Hotplug Controller"),
// Mutex to protect concurrent access as we write to choose slot and then read back status // Mutex to protect concurrent access as we write to choose slot and then read back status
&aml::Mutex::new("MLCK".into(), 0), &aml::Mutex::new("MLCK".into(), 0),
@ -1919,7 +1919,7 @@ impl Aml for MemoryManager {
&aml::Device::new( &aml::Device::new(
"_SB_.EPC_".into(), "_SB_.EPC_".into(),
vec![ vec![
&aml::Name::new("_HID".into(), &aml::EISAName::new("INT0E0C")), &aml::Name::new("_HID".into(), &aml::EisaName::new("INT0E0C")),
// QWORD describing the EPC region start and size // QWORD describing the EPC region start and size
&aml::Name::new( &aml::Name::new(
"_CRS".into(), "_CRS".into(),