External/cloud-hypervisor
1
0
Fork 0
mirror of https://github.com/cloud-hypervisor/cloud-hypervisor.git synced 2024-10-03 20:15:45 +00:00
Code Issues Packages Projects Releases Wiki Activity

pci: Make self mutable when reading from PCI config space

Browse Source 
In order to anticipate the need to support more features related to the
access of a device's PCI config space, this commits changes the self
reference in the function read_config_register() to be mutable.

This also brings some more flexibility for any implementation of the
PciDevice trait.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
This commit is contained in:
Sebastien Boeuf 2020-01-29 17:16:33 +01:00 committed by Samuel Ortiz
parent 655d9cdb0d
commit db9f9b7820
4 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
pci/src/bus.rs
View File

@ -67,7 +67,7 @@ impl PciDevice for PciRoot {
self.config.write_config_register(reg_idx, offset, data); self.config.write_config_register(reg_idx, offset, data);
} }
fn read_config_register(&self, reg_idx: usize) -> u32 { fn read_config_register(&mut self, reg_idx: usize) -> u32 {
self.config.read_reg(reg_idx) self.config.read_reg(reg_idx)
} }

2
pci/src/device.rs
View File

@ -61,7 +61,7 @@ pub trait PciDevice: BusDevice {
fn write_config_register(&mut self, reg_idx: usize, offset: u64, data: &[u8]); fn write_config_register(&mut self, reg_idx: usize, offset: u64, data: &[u8]);
/// Gets a register from the configuration space. /// Gets a register from the configuration space.
/// * `reg_idx` - The index of the config register to read. /// * `reg_idx` - The index of the config register to read.
fn read_config_register(&self, reg_idx: usize) -> u32; fn read_config_register(&mut self, reg_idx: usize) -> u32;
/// Detects if a BAR is being reprogrammed. /// Detects if a BAR is being reprogrammed.
fn detect_bar_reprogramming( fn detect_bar_reprogramming(
&mut self, &mut self,

2
vfio/src/vfio_pci.rs
View File

@ -852,7 +852,7 @@ impl PciDevice for VfioPciDevice {
.region_write(VFIO_PCI_CONFIG_REGION_INDEX, data, reg + offset); .region_write(VFIO_PCI_CONFIG_REGION_INDEX, data, reg + offset);
} }
fn read_config_register(&self, reg_idx: usize) -> u32 { fn read_config_register(&mut self, reg_idx: usize) -> u32 {
// When reading the BARs, we trap it and return what comes // When reading the BARs, we trap it and return what comes
// from our local configuration space. We want the guest to // from our local configuration space. We want the guest to
// use that and not the VFIO device BARs as it does not map // use that and not the VFIO device BARs as it does not map

2
vm-virtio/src/transport/pci_device.rs
View File

@ -556,7 +556,7 @@ impl PciDevice for VirtioPciDevice {
.write_config_register(reg_idx, offset, data); .write_config_register(reg_idx, offset, data);
} }
fn read_config_register(&self, reg_idx: usize) -> u32 { fn read_config_register(&mut self, reg_idx: usize) -> u32 {
self.configuration.read_reg(reg_idx) self.configuration.read_reg(reg_idx)
} }