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https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2025-01-21 20:15:21 +00:00
pci: vfio: Generalise VfioPciConfig trait wrapper
Rename the wrapper trait and structs since this will be used for more than reading the PCI config. Signed-off-by: Rob Bradford <robert.bradford@intel.com>
This commit is contained in:
Rob Bradford
Sebastien Boeuf
parent
ec1f7189da
commit
dc35dac306
@ -245,7 +245,7 @@ pub struct MmioRegion {
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pub(crate) mmap_size: Option<usize>,
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}
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pub(crate) trait VfioPciConfig {
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pub(crate) trait Vfio {
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fn read_config_byte(&self, offset: u32) -> u8 {
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let mut data: [u8; 1] = [0];
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self.read_config(offset, &mut data);
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@ -278,17 +278,17 @@ pub(crate) trait VfioPciConfig {
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}
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}
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struct VfioPciDeviceConfig {
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struct VfioDeviceWrapper {
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device: Arc<VfioDevice>,
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}
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impl VfioPciDeviceConfig {
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impl VfioDeviceWrapper {
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fn new(device: Arc<VfioDevice>) -> Self {
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Self { device }
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}
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}
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impl VfioPciConfig for VfioPciDeviceConfig {
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impl Vfio for VfioDeviceWrapper {
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fn read_config(&self, offset: u32, data: &mut [u8]) {
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self.device
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.region_read(VFIO_PCI_CONFIG_REGION_INDEX, data.as_mut(), offset.into());
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@ -310,7 +310,7 @@ impl VfioCommon {
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pub(crate) fn allocate_bars(
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&mut self,
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allocator: &mut SystemAllocator,
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vfio_pci_config: &dyn VfioPciConfig,
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vfio_wrapper: &dyn Vfio,
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) -> std::result::Result<Vec<(GuestAddress, GuestUsize, PciBarRegionType)>, PciDeviceError>
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{
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let mut ranges = Vec::new();
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@ -331,7 +331,7 @@ impl VfioCommon {
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};
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// First read flags
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let flags = vfio_pci_config.read_config_dword(bar_offset);
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let flags = vfio_wrapper.read_config_dword(bar_offset);
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// Is this an IO BAR?
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let io_bar = if bar_id != VFIO_PCI_ROM_REGION_INDEX {
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@ -354,10 +354,10 @@ impl VfioCommon {
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let mut region_type = PciBarRegionType::Memory32BitRegion;
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// To get size write all 1s
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vfio_pci_config.write_config_dword(bar_offset, 0xffff_ffff);
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vfio_wrapper.write_config_dword(bar_offset, 0xffff_ffff);
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// And read back BAR value. The device will write zeros for bits it doesn't care about
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let mut lower = vfio_pci_config.read_config_dword(bar_offset);
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let mut lower = vfio_wrapper.read_config_dword(bar_offset);
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if io_bar {
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#[cfg(target_arch = "x86_64")]
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@ -390,8 +390,8 @@ impl VfioCommon {
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// Query size of upper BAR of 64-bit BAR
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let upper_offset: u32 = PCI_CONFIG_BAR_OFFSET + (bar_id + 1) * 4;
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vfio_pci_config.write_config_dword(upper_offset, 0xffff_ffff);
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let upper = vfio_pci_config.read_config_dword(upper_offset);
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vfio_wrapper.write_config_dword(upper_offset, 0xffff_ffff);
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let upper = vfio_wrapper.read_config_dword(upper_offset);
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let mut combined_size = u64::from(upper) << 32 | u64::from(lower);
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@ -499,13 +499,13 @@ impl VfioCommon {
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&mut self,
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cap: u8,
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interrupt_manager: &Arc<dyn InterruptManager<GroupConfig = MsiIrqGroupConfig>>,
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vfio_pci_config: &dyn VfioPciConfig,
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vfio_wrapper: &dyn Vfio,
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) {
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let msg_ctl = vfio_pci_config.read_config_word((cap + 2).into());
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let msg_ctl = vfio_wrapper.read_config_word((cap + 2).into());
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let table = vfio_pci_config.read_config_dword((cap + 4).into());
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let table = vfio_wrapper.read_config_dword((cap + 4).into());
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let pba = vfio_pci_config.read_config_dword((cap + 8).into());
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let pba = vfio_wrapper.read_config_dword((cap + 8).into());
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let msix_cap = MsixCap {
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msg_ctl,
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@ -534,9 +534,9 @@ impl VfioCommon {
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&mut self,
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cap: u8,
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interrupt_manager: &Arc<dyn InterruptManager<GroupConfig = MsiIrqGroupConfig>>,
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vfio_pci_config: &dyn VfioPciConfig,
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vfio_wrapper: &dyn Vfio,
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) {
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let msg_ctl = vfio_pci_config.read_config_word((cap + 2).into());
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let msg_ctl = vfio_wrapper.read_config_word((cap + 2).into());
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let interrupt_source_group = interrupt_manager
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.create_group(MsiIrqGroupConfig {
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@ -565,7 +565,7 @@ pub struct VfioPciDevice {
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vm: Arc<dyn hypervisor::Vm>,
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device: Arc<VfioDevice>,
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container: Arc<VfioContainer>,
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vfio_pci_configuration: VfioPciDeviceConfig,
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vfio_wrapper: VfioDeviceWrapper,
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common: VfioCommon,
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iommu_attached: bool,
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}
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@ -596,13 +596,13 @@ impl VfioPciDevice {
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None,
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);
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let vfio_pci_configuration = VfioPciDeviceConfig::new(Arc::clone(&device));
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let vfio_wrapper = VfioDeviceWrapper::new(Arc::clone(&device));
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let mut vfio_pci_device = VfioPciDevice {
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vm: vm.clone(),
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device,
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container,
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vfio_pci_configuration,
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vfio_wrapper,
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common: VfioCommon {
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mmio_regions: Vec::new(),
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configuration,
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@ -735,13 +735,11 @@ impl VfioPciDevice {
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interrupt_manager: &Arc<dyn InterruptManager<GroupConfig = MsiIrqGroupConfig>>,
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) {
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let mut cap_next = self
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.vfio_pci_configuration
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.vfio_wrapper
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.read_config_byte(PCI_CONFIG_CAPABILITY_OFFSET);
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while cap_next != 0 {
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let cap_id = self
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.vfio_pci_configuration
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.read_config_byte(cap_next.into());
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let cap_id = self.vfio_wrapper.read_config_byte(cap_next.into());
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match PciCapabilityId::from(cap_id) {
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PciCapabilityId::MessageSignalledInterrupts => {
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@ -752,7 +750,7 @@ impl VfioPciDevice {
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self.common.parse_msi_capabilities(
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cap_next,
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interrupt_manager,
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&self.vfio_pci_configuration,
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&self.vfio_wrapper,
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);
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}
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}
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@ -765,7 +763,7 @@ impl VfioPciDevice {
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self.common.parse_msix_capabilities(
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cap_next,
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interrupt_manager,
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&self.vfio_pci_configuration,
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&self.vfio_wrapper,
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);
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}
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}
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@ -773,9 +771,7 @@ impl VfioPciDevice {
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_ => {}
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};
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cap_next = self
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.vfio_pci_configuration
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.read_config_byte((cap_next + 1).into());
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cap_next = self.vfio_wrapper.read_config_byte((cap_next + 1).into());
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}
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}
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@ -1020,8 +1016,7 @@ impl PciDevice for VfioPciDevice {
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allocator: &mut SystemAllocator,
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) -> std::result::Result<Vec<(GuestAddress, GuestUsize, PciBarRegionType)>, PciDeviceError>
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{
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self.common
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.allocate_bars(allocator, &self.vfio_pci_configuration)
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self.common.allocate_bars(allocator, &self.vfio_wrapper)
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}
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fn free_bars(
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@ -1083,8 +1078,7 @@ impl PciDevice for VfioPciDevice {
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// enabling this bit, we first need to enable the MSI interrupts with
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// VFIO through VFIO_DEVICE_SET_IRQS ioctl, and only after we can write
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// to the device region to update the MSI Enable bit.
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self.vfio_pci_configuration
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.write_config((reg + offset) as u32, data);
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self.vfio_wrapper.write_config((reg + offset) as u32, data);
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None
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}
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@ -1110,9 +1104,7 @@ impl PciDevice for VfioPciDevice {
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};
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// The config register read comes from the VFIO device itself.
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self.vfio_pci_configuration
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.read_config_dword((reg_idx * 4) as u32)
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& mask
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self.vfio_wrapper.read_config_dword((reg_idx * 4) as u32) & mask
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}
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fn detect_bar_reprogramming(
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