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devices: Automatically fix operator precedence clippy warning

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Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
This commit is contained in:
Rob Bradford 2025-01-06 18:08:19 +00:00 committed by Bo Chen
parent b6667f948e
commit dd0b95ba5c
2 changed files with 7 additions and 7 deletions
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12
devices/src/ioapic.rs
View File

@ -346,9 +346,9 @@ impl Ioapic {
// Generate MSI message address
let low_addr: u32 = self.apic_address.0 as u32
| u32::from(destination_id) << 12
| u32::from(redirection_hint) << 3
| u32::from(destination_mode) << 2;
| (u32::from(destination_id) << 12)
| (u32::from(redirection_hint) << 3)
| (u32::from(destination_mode) << 2);
// Validate Trigger Mode value
let trigger_mode = trigger_mode(entry);
@ -372,9 +372,9 @@ impl Ioapic {
}
// Generate MSI message data
let data: u32 = u32::from(trigger_mode) << 15
| u32::from(remote_irr(entry)) << 14
| u32::from(delivery_mode) << 8
let data: u32 = (u32::from(trigger_mode) << 15)
| (u32::from(remote_irr(entry)) << 14)
| (u32::from(delivery_mode) << 8)
| u32::from(vector(entry));
let config = MsiIrqSourceConfig {

2
devices/src/legacy/cmos.rs
View File

@ -152,7 +152,7 @@ impl BusDevice for Cmos {
0x08 => to_bcd(month as u8),
0x09 => to_bcd((year % 100) as u8),
// Bit 5 for 32kHz clock. Bit 7 for Update in Progress
0x0a => 1 << 5 | (update_in_progress as u8) << 7,
0x0a => (1 << 5) | ((update_in_progress as u8) << 7),
// Bit 0-6 are reserved and must be 0.
// Bit 7 must be 1 (CMOS has power)
0x0d => 1 << 7,