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vmm: add pci_segment mmio aperture configs
When using multiple PCI segments, the 32-bit and 64-bit mmio aperture is split equally between each segment. Add an option to configure the 'weight'. For example, a PCI segment with a `mmio32_aperture_weight` of 2 will be allocated twice as much 32-bit mmio space as a normal PCI segment. Signed-off-by: Thomas Barrett <tbarrett@crusoeenergy.com>
This commit is contained in:
parent
a84bc06874
commit
e7e856d8ac
29
docs/vfio.md
29
docs/vfio.md
@ -122,4 +122,31 @@ $ ls /sys/kernel/iommu_groups/22/devices/
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This means these two devices are under the same IOMMU group 22. In such case,
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it is important to bind both devices to VFIO and pass them both through the
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VM, otherwise this could cause some functional and security issues.
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VM, otherwise this could cause some functional and security issues.
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### Advanced Configuration Options
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Some VFIO devices have a 32-bit mmio BAR. When using many such devices, it is
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possible to exhaust the 32-bit mmio space available on a PCI segment. The
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following example demonstrates an example device with a 16 MiB 32-bit mmio BAR.
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```
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lspci -s 0000:01:00.0 -v
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0000:01:00.0 3D controller: NVIDIA Corporation Device 26b9 (rev a1)
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[...]
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Memory at f9000000 (32-bit, non-prefetchable) [size=16M]
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Memory at 46000000000 (64-bit, prefetchable) [size=64G]
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Memory at 48040000000 (64-bit, prefetchable) [size=32M]
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[...]
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```
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When using multiple PCI segments, the 32-bit mmio address space available to
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be allocated to VFIO devices is equally split between all PCI segments by
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default. This can be tuned with the `--pci-segment` flag. The following example
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demonstrates a guest with two PCI segments. 2/3 of the 32-bit mmio address
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space is available for use by devices on PCI segment 0 and 1/3 of the 32-bit
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mmio address space is available for use by devices on PCI segment 1.
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```
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--platform num_pci_segments=2
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--pci-segment pci_segment=0,mmio32_aperture_weight=2
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--pci-segment pci_segment=1,mmio32_aperture_weight=1
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```
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@ -187,6 +187,7 @@ impl RequestHandler for StubApiRequestHandler {
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watchdog: false,
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#[cfg(feature = "guest_debug")]
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gdb: false,
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pci_segments: None,
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platform: None,
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tpm: None,
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preserved_fds: None,
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@ -355,6 +355,13 @@ fn create_app(default_vcpus: String, default_memory: String, default_rng: String
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.num_args(1..)
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.group("vm-config"),
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)
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.arg(
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Arg::new("pci-segment")
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.long("pci-segment")
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.help(config::PciSegmentConfig::SYNTAX)
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.num_args(1..)
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.group("vm-config"),
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)
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.arg(
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Arg::new("watchdog")
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.long("watchdog")
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@ -934,6 +941,7 @@ mod unit_tests {
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watchdog: false,
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#[cfg(feature = "guest_debug")]
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gdb: false,
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pci_segments: None,
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platform: None,
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tpm: None,
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preserved_fds: None,
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@ -618,6 +618,10 @@ components:
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pvpanic:
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type: boolean
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default: false
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pci_segments:
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type: array
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items:
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$ref: "#/components/schemas/PciSegmentConfig"
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platform:
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$ref: "#/components/schemas/PlatformConfig"
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tpm:
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@ -683,6 +687,21 @@ components:
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features:
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$ref: "#/components/schemas/CpuFeatures"
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PciSegmentConfig:
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required:
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- pci_segment
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type: object
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properties:
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pci_segment:
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type: integer
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format: int16
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mmio32_aperture_weight:
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type: integer
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format: int32
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mmio64_aperture_weight:
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type: integer
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format: int32
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PlatformConfig:
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type: object
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properties:
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@ -98,6 +98,8 @@ pub enum Error {
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ParseUserDevice(OptionParserError),
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/// Missing socket for userspace device
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ParseUserDeviceSocketMissing,
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/// Error parsing pci segment options
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ParsePciSegment(OptionParserError),
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/// Failed parsing platform parameters
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ParsePlatform(OptionParserError),
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/// Failed parsing vDPA device
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@ -170,6 +172,8 @@ pub enum ValidationError {
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InvalidNumPciSegments(u16),
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/// Invalid PCI segment id
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InvalidPciSegment(u16),
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/// Invalid PCI segment aperture weight
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InvalidPciSegmentApertureWeight(u32),
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/// Balloon too big
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BalloonLargerThanRam(u64, u64),
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/// On a IOMMU segment but not behind IOMMU
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@ -279,6 +283,9 @@ impl fmt::Display for ValidationError {
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InvalidPciSegment(pci_segment) => {
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write!(f, "Invalid PCI segment id: {pci_segment}")
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}
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InvalidPciSegmentApertureWeight(aperture_weight) => {
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write!(f, "Invalid PCI segment aperture weight: {aperture_weight}")
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}
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BalloonLargerThanRam(balloon_size, ram_size) => {
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write!(
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f,
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@ -395,6 +402,7 @@ impl fmt::Display for Error {
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ParseTdx(o) => write!(f, "Error parsing --tdx: {o}"),
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#[cfg(feature = "tdx")]
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FirmwarePathMissing => write!(f, "TDX firmware missing"),
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ParsePciSegment(o) => write!(f, "Error parsing --pci-segment: {o}"),
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ParsePlatform(o) => write!(f, "Error parsing --platform: {o}"),
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ParseVdpa(o) => write!(f, "Error parsing --vdpa: {o}"),
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ParseVdpaPathMissing => write!(f, "Error parsing --vdpa: path missing"),
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@ -444,6 +452,7 @@ pub struct VmParams<'a> {
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pub watchdog: bool,
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#[cfg(feature = "guest_debug")]
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pub gdb: bool,
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pub pci_segments: Option<Vec<&'a str>>,
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pub platform: Option<&'a str>,
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pub tpm: Option<&'a str>,
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#[cfg(feature = "igvm")]
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@ -504,6 +513,9 @@ impl<'a> VmParams<'a> {
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.get_many::<String>("numa")
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.map(|x| x.map(|y| y as &str).collect());
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let watchdog = args.get_flag("watchdog");
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let pci_segments: Option<Vec<&str>> = args
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.get_many::<String>("pci-segment")
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.map(|x| x.map(|y| y as &str).collect());
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let platform = args.get_one::<String>("platform").map(|x| x as &str);
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#[cfg(feature = "guest_debug")]
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let gdb = args.contains_id("gdb");
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@ -542,6 +554,7 @@ impl<'a> VmParams<'a> {
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watchdog,
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#[cfg(feature = "guest_debug")]
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gdb,
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pci_segments,
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platform,
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tpm,
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#[cfg(feature = "igvm")]
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@ -678,6 +691,64 @@ impl CpusConfig {
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}
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}
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impl PciSegmentConfig {
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pub const SYNTAX: &'static str = "PCI Segment parameters \
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\"pci_segment=<segment_id>,mmio32_aperture_weight=<scale>,mmio64_aperture_weight=<scale>\"";
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pub fn parse(disk: &str) -> Result<Self> {
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let mut parser = OptionParser::new();
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parser
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.add("mmio32_aperture_weight")
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.add("mmio64_aperture_weight")
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.add("pci_segment");
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parser.parse(disk).map_err(Error::ParsePciSegment)?;
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let pci_segment = parser
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.convert("pci_segment")
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.map_err(Error::ParsePciSegment)?
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.unwrap_or_default();
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let mmio32_aperture_weight = parser
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.convert("mmio32_aperture_weight")
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.map_err(Error::ParsePciSegment)?
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.unwrap_or(DEFAULT_PCI_SEGMENT_APERTURE_WEIGHT);
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let mmio64_aperture_weight = parser
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.convert("mmio64_aperture_weight")
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.map_err(Error::ParsePciSegment)?
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.unwrap_or(DEFAULT_PCI_SEGMENT_APERTURE_WEIGHT);
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Ok(PciSegmentConfig {
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pci_segment,
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mmio32_aperture_weight,
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mmio64_aperture_weight,
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})
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}
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pub fn validate(&self, vm_config: &VmConfig) -> ValidationResult<()> {
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let num_pci_segments = match &vm_config.platform {
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Some(platform_config) => platform_config.num_pci_segments,
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None => 1,
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};
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if self.pci_segment >= num_pci_segments {
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return Err(ValidationError::InvalidPciSegment(self.pci_segment));
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}
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if self.mmio32_aperture_weight == 0 {
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return Err(ValidationError::InvalidPciSegmentApertureWeight(
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self.mmio32_aperture_weight,
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));
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}
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if self.mmio64_aperture_weight == 0 {
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return Err(ValidationError::InvalidPciSegmentApertureWeight(
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self.mmio64_aperture_weight,
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));
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}
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Ok(())
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}
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}
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impl PlatformConfig {
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pub fn parse(platform: &str) -> Result<Self> {
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let mut parser = OptionParser::new();
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@ -2449,6 +2520,12 @@ impl VmConfig {
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}
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}
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if let Some(pci_segments) = &self.pci_segments {
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for pci_segment in pci_segments {
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pci_segment.validate(self)?;
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}
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}
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self.platform.as_ref().map(|p| p.validate()).transpose()?;
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self.iommu |= self
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.platform
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@ -2557,6 +2634,16 @@ impl VmConfig {
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vsock = Some(vsock_config);
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}
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let mut pci_segments: Option<Vec<PciSegmentConfig>> = None;
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if let Some(pci_segment_list) = &vm_params.pci_segments {
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let mut pci_segment_config_list = Vec::new();
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for item in pci_segment_list.iter() {
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let pci_segment_config = PciSegmentConfig::parse(item)?;
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pci_segment_config_list.push(pci_segment_config);
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}
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pci_segments = Some(pci_segment_config_list);
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}
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let platform = vm_params.platform.map(PlatformConfig::parse).transpose()?;
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#[cfg(target_arch = "x86_64")]
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@ -2643,6 +2730,7 @@ impl VmConfig {
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watchdog: vm_params.watchdog,
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#[cfg(feature = "guest_debug")]
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gdb,
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pci_segments,
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platform,
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tpm,
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preserved_fds: None,
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@ -2764,6 +2852,7 @@ impl Clone for VmConfig {
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#[cfg(target_arch = "x86_64")]
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sgx_epc: self.sgx_epc.clone(),
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numa: self.numa.clone(),
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pci_segments: self.pci_segments.clone(),
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platform: self.platform.clone(),
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tpm: self.tpm.clone(),
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preserved_fds: self
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@ -2960,6 +3049,46 @@ mod tests {
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Ok(())
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}
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#[test]
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fn test_pci_segment_parsing() -> Result<()> {
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assert_eq!(
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PciSegmentConfig::parse("pci_segment=0")?,
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PciSegmentConfig {
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pci_segment: 0,
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mmio32_aperture_weight: 1,
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mmio64_aperture_weight: 1,
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}
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);
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assert_eq!(
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PciSegmentConfig::parse(
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"pci_segment=0,mmio32_aperture_weight=1,mmio64_aperture_weight=1"
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)?,
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PciSegmentConfig {
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pci_segment: 0,
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mmio32_aperture_weight: 1,
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mmio64_aperture_weight: 1,
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}
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);
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assert_eq!(
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PciSegmentConfig::parse("pci_segment=0,mmio32_aperture_weight=2")?,
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PciSegmentConfig {
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pci_segment: 0,
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mmio32_aperture_weight: 2,
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mmio64_aperture_weight: 1,
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}
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);
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assert_eq!(
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PciSegmentConfig::parse("pci_segment=0,mmio64_aperture_weight=2")?,
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PciSegmentConfig {
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pci_segment: 0,
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mmio32_aperture_weight: 1,
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mmio64_aperture_weight: 2,
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}
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);
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Ok(())
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}
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fn disk_fixture() -> DiskConfig {
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DiskConfig {
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path: Some(PathBuf::from("/path/to_file")),
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@ -3536,6 +3665,7 @@ mod tests {
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watchdog: false,
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#[cfg(feature = "guest_debug")]
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gdb: false,
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pci_segments: None,
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platform: None,
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tpm: None,
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preserved_fds: None,
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@ -3946,6 +4076,28 @@ mod tests {
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Err(ValidationError::PciSegmentReused(1, 0, 1))
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);
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let mut invalid_config = valid_config.clone();
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invalid_config.pci_segments = Some(vec![PciSegmentConfig {
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pci_segment: 0,
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mmio32_aperture_weight: 1,
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mmio64_aperture_weight: 0,
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}]);
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assert_eq!(
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invalid_config.validate(),
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Err(ValidationError::InvalidPciSegmentApertureWeight(0))
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);
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let mut invalid_config = valid_config.clone();
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invalid_config.pci_segments = Some(vec![PciSegmentConfig {
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pci_segment: 0,
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mmio32_aperture_weight: 0,
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mmio64_aperture_weight: 1,
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}]);
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assert_eq!(
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invalid_config.validate(),
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Err(ValidationError::InvalidPciSegmentApertureWeight(0))
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);
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let mut invalid_config = valid_config.clone();
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invalid_config.numa = Some(vec![
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NumaConfig {
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|
@ -22,6 +22,7 @@ use crate::pci_segment::PciSegment;
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use crate::seccomp_filters::{get_seccomp_filter, Thread};
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use crate::serial_manager::{Error as SerialManagerError, SerialManager};
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use crate::sigwinch_listener::start_sigwinch_listener;
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use crate::vm_config::DEFAULT_PCI_SEGMENT_APERTURE_WEIGHT;
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use crate::GuestRegionMmap;
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use crate::PciDeviceInfo;
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use crate::{device_node, DEVICE_MANAGER_SNAPSHOT_ID};
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@ -969,6 +970,34 @@ pub struct DeviceManager {
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mmio_regions: Arc<Mutex<Vec<MmioRegion>>>,
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}
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fn create_mmio_allocators(
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start: u64,
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end: u64,
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num_pci_segments: u16,
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weights: Vec<u32>,
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alignment: u64,
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) -> Vec<Arc<Mutex<AddressAllocator>>> {
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let total_weight: u32 = weights.iter().sum();
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// Start each PCI segment mmio range on an aligned boundary
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let pci_segment_mmio_size = (end - start + 1) / (alignment * total_weight as u64) * alignment;
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let mut mmio_allocators = vec![];
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let mut i = 0;
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for segment_id in 0..num_pci_segments as u64 {
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let weight = weights[segment_id as usize] as u64;
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let mmio_start = start + i * pci_segment_mmio_size;
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let mmio_size = pci_segment_mmio_size * weight;
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let allocator = Arc::new(Mutex::new(
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AddressAllocator::new(GuestAddress(mmio_start), mmio_size).unwrap(),
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));
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mmio_allocators.push(allocator);
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i += weight;
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}
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mmio_allocators
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}
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impl DeviceManager {
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#[allow(clippy::too_many_arguments)]
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pub fn new(
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@ -1009,22 +1038,16 @@ impl DeviceManager {
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1
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};
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let create_mmio_allocators = |start, end, num_pci_segments, alignment| {
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// Start each PCI segment mmio range on an aligned boundary
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let pci_segment_mmio_size =
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(end - start + 1) / (alignment * num_pci_segments as u64) * alignment;
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let mut mmio_allocators = vec![];
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for i in 0..num_pci_segments as u64 {
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let mmio_start = start + i * pci_segment_mmio_size;
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let allocator = Arc::new(Mutex::new(
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AddressAllocator::new(GuestAddress(mmio_start), pci_segment_mmio_size).unwrap(),
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));
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mmio_allocators.push(allocator)
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let mut mmio32_aperture_weights: Vec<u32> =
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std::iter::repeat(DEFAULT_PCI_SEGMENT_APERTURE_WEIGHT)
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.take(num_pci_segments.into())
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.collect();
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if let Some(pci_segments) = &config.lock().unwrap().pci_segments {
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for pci_segment in pci_segments.iter() {
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mmio32_aperture_weights[pci_segment.pci_segment as usize] =
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pci_segment.mmio32_aperture_weight
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}
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mmio_allocators
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};
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}
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let start_of_mmio32_area = layout::MEM_32BIT_DEVICES_START.0;
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let end_of_mmio32_area = layout::MEM_32BIT_DEVICES_START.0 + layout::MEM_32BIT_DEVICES_SIZE;
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@ -1032,15 +1055,28 @@ impl DeviceManager {
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start_of_mmio32_area,
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end_of_mmio32_area,
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num_pci_segments,
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mmio32_aperture_weights,
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4 << 10,
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);
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let mut mmio64_aperture_weights: Vec<u32> =
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std::iter::repeat(DEFAULT_PCI_SEGMENT_APERTURE_WEIGHT)
|
||||
.take(num_pci_segments.into())
|
||||
.collect();
|
||||
if let Some(pci_segments) = &config.lock().unwrap().pci_segments {
|
||||
for pci_segment in pci_segments.iter() {
|
||||
mmio64_aperture_weights[pci_segment.pci_segment as usize] =
|
||||
pci_segment.mmio64_aperture_weight
|
||||
}
|
||||
}
|
||||
|
||||
let start_of_mmio64_area = memory_manager.lock().unwrap().start_of_device_area().0;
|
||||
let end_of_mmio64_area = memory_manager.lock().unwrap().end_of_device_area().0;
|
||||
let pci_mmio64_allocators = create_mmio_allocators(
|
||||
start_of_mmio64_area,
|
||||
end_of_mmio64_area,
|
||||
num_pci_segments,
|
||||
mmio64_aperture_weights,
|
||||
4 << 30,
|
||||
);
|
||||
|
||||
@ -4997,3 +5033,60 @@ impl Drop for DeviceManager {
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(test)]
|
||||
mod tests {
|
||||
use super::*;
|
||||
|
||||
#[test]
|
||||
fn test_create_mmio_allocators() {
|
||||
let res = create_mmio_allocators(0x100000, 0x400000, 1, vec![1], 4 << 10);
|
||||
assert_eq!(res.len(), 1);
|
||||
assert_eq!(
|
||||
res[0].lock().unwrap().base(),
|
||||
vm_memory::GuestAddress(0x100000)
|
||||
);
|
||||
assert_eq!(
|
||||
res[0].lock().unwrap().end(),
|
||||
vm_memory::GuestAddress(0x3fffff)
|
||||
);
|
||||
|
||||
let res = create_mmio_allocators(0x100000, 0x400000, 2, vec![1, 1], 4 << 10);
|
||||
assert_eq!(res.len(), 2);
|
||||
assert_eq!(
|
||||
res[0].lock().unwrap().base(),
|
||||
vm_memory::GuestAddress(0x100000)
|
||||
);
|
||||
assert_eq!(
|
||||
res[0].lock().unwrap().end(),
|
||||
vm_memory::GuestAddress(0x27ffff)
|
||||
);
|
||||
assert_eq!(
|
||||
res[1].lock().unwrap().base(),
|
||||
vm_memory::GuestAddress(0x280000)
|
||||
);
|
||||
assert_eq!(
|
||||
res[1].lock().unwrap().end(),
|
||||
vm_memory::GuestAddress(0x3fffff)
|
||||
);
|
||||
|
||||
let res = create_mmio_allocators(0x100000, 0x400000, 2, vec![2, 1], 4 << 10);
|
||||
assert_eq!(res.len(), 2);
|
||||
assert_eq!(
|
||||
res[0].lock().unwrap().base(),
|
||||
vm_memory::GuestAddress(0x100000)
|
||||
);
|
||||
assert_eq!(
|
||||
res[0].lock().unwrap().end(),
|
||||
vm_memory::GuestAddress(0x2fffff)
|
||||
);
|
||||
assert_eq!(
|
||||
res[1].lock().unwrap().base(),
|
||||
vm_memory::GuestAddress(0x300000)
|
||||
);
|
||||
assert_eq!(
|
||||
res[1].lock().unwrap().end(),
|
||||
vm_memory::GuestAddress(0x3fffff)
|
||||
);
|
||||
}
|
||||
}
|
||||
|
@ -2151,6 +2151,7 @@ mod unit_tests {
|
||||
watchdog: false,
|
||||
#[cfg(feature = "guest_debug")]
|
||||
gdb: false,
|
||||
pci_segments: None,
|
||||
platform: None,
|
||||
tpm: None,
|
||||
preserved_fds: None,
|
||||
|
@ -94,6 +94,22 @@ pub struct PlatformConfig {
|
||||
pub sev_snp: bool,
|
||||
}
|
||||
|
||||
pub const DEFAULT_PCI_SEGMENT_APERTURE_WEIGHT: u32 = 1;
|
||||
|
||||
fn default_pci_segment_aperture_weight() -> u32 {
|
||||
DEFAULT_PCI_SEGMENT_APERTURE_WEIGHT
|
||||
}
|
||||
|
||||
#[derive(Clone, Debug, PartialEq, Eq, Deserialize, Serialize)]
|
||||
pub struct PciSegmentConfig {
|
||||
#[serde(default)]
|
||||
pub pci_segment: u16,
|
||||
#[serde(default = "default_pci_segment_aperture_weight")]
|
||||
pub mmio32_aperture_weight: u32,
|
||||
#[serde(default = "default_pci_segment_aperture_weight")]
|
||||
pub mmio64_aperture_weight: u32,
|
||||
}
|
||||
|
||||
#[derive(Clone, Debug, PartialEq, Eq, Deserialize, Serialize)]
|
||||
pub struct MemoryZoneConfig {
|
||||
pub id: String,
|
||||
@ -620,6 +636,7 @@ pub struct VmConfig {
|
||||
#[cfg(feature = "guest_debug")]
|
||||
#[serde(default)]
|
||||
pub gdb: bool,
|
||||
pub pci_segments: Option<Vec<PciSegmentConfig>>,
|
||||
pub platform: Option<PlatformConfig>,
|
||||
pub tpm: Option<TpmConfig>,
|
||||
// Preserved FDs are the ones that share the same life-time as its holding
|
||||
|
Loading…
Reference in New Issue
Block a user