mirror of
https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2024-10-03 20:15:45 +00:00
acpi_tables: Add initial ACPI tables support
Add a revision 2 RSDP table only supporting an XSDT along with support for creating generic SDT based tables. Signed-off-by: Rob Bradford <robert.bradford@intel.com>
This commit is contained in:
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8
Cargo.lock
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8
Cargo.lock
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# This file is automatically @generated by Cargo.
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# This file is automatically @generated by Cargo.
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# It is not intended for manual editing.
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# It is not intended for manual editing.
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[[package]]
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name = "acpi_tables"
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version = "0.1.0"
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dependencies = [
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"vm-memory 0.1.0 (git+https://github.com/rust-vmm/vm-memory)",
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]
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[[package]]
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[[package]]
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name = "aho-corasick"
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name = "aho-corasick"
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version = "0.6.10"
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version = "0.6.10"
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@ -1024,6 +1031,7 @@ dependencies = [
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name = "vmm"
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name = "vmm"
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version = "0.1.0"
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version = "0.1.0"
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dependencies = [
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dependencies = [
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"acpi_tables 0.1.0",
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"arch 0.1.0",
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"arch 0.1.0",
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"devices 0.1.0",
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"devices 0.1.0",
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"epoll 4.1.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"epoll 4.1.0 (registry+https://github.com/rust-lang/crates.io-index)",
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acpi_tables/Cargo.toml
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acpi_tables/Cargo.toml
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[package]
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name = "acpi_tables"
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version = "0.1.0"
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authors = ["The Cloud Hypervisor Authors"]
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edition = "2018"
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[dependencies]
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vm-memory = { git = "https://github.com/rust-vmm/vm-memory" }
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acpi_tables/src/lib.rs
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acpi_tables/src/lib.rs
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// Copyright © 2019 Intel Corporation
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//
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// SPDX-License-Identifier: Apache-2.0
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//
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pub mod rsdp;
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pub mod sdt;
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fn generate_checksum(data: &[u8]) -> u8 {
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(255 - data.iter().fold(0u8, |acc, x| acc.wrapping_add(*x))).wrapping_add(1)
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}
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67
acpi_tables/src/rsdp.rs
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67
acpi_tables/src/rsdp.rs
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// Copyright © 2019 Intel Corporation
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//
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// SPDX-License-Identifier: Apache-2.0
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//
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use vm_memory::ByteValued;
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#[repr(packed)]
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#[derive(Clone, Copy, Default)]
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pub struct RSDP {
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pub signature: [u8; 8],
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pub checksum: u8,
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pub oem_id: [u8; 6],
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pub revision: u8,
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_rsdt_addr: u32,
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pub length: u32,
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pub xsdt_addr: u64,
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pub extended_checksum: u8,
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_reserved: [u8; 3],
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}
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unsafe impl ByteValued for RSDP {}
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impl RSDP {
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pub fn new(oem_id: [u8; 6], xsdt_addr: u64) -> Self {
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let mut rsdp = RSDP {
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signature: *b"RSD PTR ",
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checksum: 0,
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oem_id,
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revision: 2,
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_rsdt_addr: 0,
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length: std::mem::size_of::<RSDP>() as u32,
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xsdt_addr,
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extended_checksum: 0,
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_reserved: [0; 3],
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};
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rsdp.checksum = super::generate_checksum(&rsdp.as_slice()[0..19]);
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rsdp.extended_checksum = super::generate_checksum(&rsdp.as_slice());;
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rsdp
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}
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pub fn len() -> usize {
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std::mem::size_of::<RSDP>()
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}
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}
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#[cfg(test)]
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mod tests {
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use super::RSDP;
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use vm_memory::bytes::ByteValued;
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#[test]
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fn test_rsdp() {
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let rsdp = RSDP::new(*b"CHYPER", 0xdead_beef);
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let sum = rsdp
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.as_slice()
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.iter()
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.fold(0u8, |acc, x| acc.wrapping_add(*x));
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assert_eq!(sum, 0);
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let sum: u8 = rsdp
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.as_slice()
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.iter()
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.fold(0u8, |acc, x| acc.wrapping_add(*x));
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assert_eq!(sum, 0);
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}
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}
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129
acpi_tables/src/sdt.rs
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129
acpi_tables/src/sdt.rs
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// Copyright © 2019 Intel Corporation
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//
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// SPDX-License-Identifier: Apache-2.0
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//
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#[repr(packed)]
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pub struct GenericAddress {
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pub address_space_id: u8,
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pub register_bit_width: u8,
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pub register_bit_offset: u8,
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pub access_size: u8,
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pub address: u64,
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}
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impl GenericAddress {
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pub fn io_port_address(address: u16) -> Self {
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GenericAddress {
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address_space_id: 1,
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register_bit_width: 8,
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register_bit_offset: 0,
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access_size: 1,
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address: u64::from(address),
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}
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}
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}
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pub struct SDT {
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data: Vec<u8>,
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}
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#[allow(clippy::len_without_is_empty)]
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impl SDT {
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pub fn new(
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signature: [u8; 4],
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length: u32,
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revision: u8,
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oem_id: [u8; 6],
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oem_table: [u8; 8],
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oem_revision: u32,
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) -> Self {
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assert!(length >= 36);
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let mut data = Vec::with_capacity(length as usize);
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data.extend_from_slice(&signature);
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data.extend_from_slice(&length.to_le_bytes());
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data.push(revision);
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data.push(0); // checksum
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data.extend_from_slice(&oem_id);
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data.extend_from_slice(&oem_table);
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data.extend_from_slice(&oem_revision.to_le_bytes());
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data.extend_from_slice(b"CLDH");
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data.extend_from_slice(&0u32.to_le_bytes());
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assert_eq!(data.len(), 36);
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data.resize(length as usize, 0);
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let mut sdt = SDT { data };
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sdt.update_checksum();
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sdt
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}
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pub fn update_checksum(&mut self) {
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self.data[9] = 0;
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let checksum = super::generate_checksum(self.data.as_slice());
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self.data[9] = checksum
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}
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pub fn as_slice(&self) -> &[u8] {
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&self.data.as_slice()
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}
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pub fn append<T>(&mut self, value: T) {
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let orig_length = self.data.len();
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let new_length = orig_length + std::mem::size_of::<T>();
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self.data.resize(new_length, 0);
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self.write_u32(4, new_length as u32);
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self.write(orig_length, value);
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}
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/// Write a value at the given offset
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pub fn write<T>(&mut self, offset: usize, value: T) {
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assert!((offset + (std::mem::size_of::<T>() - 1)) < self.data.len());
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unsafe {
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*(((self.data.as_mut_ptr() as usize) + offset) as *mut T) = value;
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}
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self.update_checksum();
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}
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pub fn write_u8(&mut self, offset: usize, val: u8) {
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self.write(offset, val);
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}
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pub fn write_u16(&mut self, offset: usize, val: u16) {
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self.write(offset, val);
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}
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pub fn write_u32(&mut self, offset: usize, val: u32) {
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self.write(offset, val);
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}
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pub fn write_u64(&mut self, offset: usize, val: u64) {
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self.write(offset, val);
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}
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pub fn len(&self) -> usize {
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self.data.len()
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}
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}
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#[cfg(test)]
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mod tests {
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use super::SDT;
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#[test]
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fn test_sdt() {
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let mut sdt = SDT::new(*b"TEST", 40, 1, *b"CLOUDH", *b"TESTTEST", 1);
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let sum: u8 = sdt
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.as_slice()
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.iter()
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.fold(0u8, |acc, x| acc.wrapping_add(*x));
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assert_eq!(sum, 0);
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sdt.write_u32(36, 0x12345678);
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let sum: u8 = sdt
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.as_slice()
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.iter()
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.fold(0u8, |acc, x| acc.wrapping_add(*x));
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assert_eq!(sum, 0);
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}
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}
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@ -5,6 +5,7 @@ authors = ["The Cloud Hypervisor Authors"]
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edition = "2018"
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edition = "2018"
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[dependencies]
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[dependencies]
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acpi_tables = { path = "../acpi_tables" }
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arch = { path = "../arch" }
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arch = { path = "../arch" }
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devices = { path = "../devices" }
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devices = { path = "../devices" }
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epoll = "4.1.0"
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epoll = "4.1.0"
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