build: Bump acpi_tables from cb5f06c to 05a6091

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
This commit is contained in:
Rob Bradford 2023-06-08 16:49:52 +01:00 committed by dependabot[bot]
parent 1faaa2cd0a
commit f485922b78
7 changed files with 13 additions and 4 deletions

2
Cargo.lock generated
View File

@ -5,7 +5,7 @@ version = 3
[[package]]
name = "acpi_tables"
version = "0.1.0"
source = "git+https://github.com/rust-vmm/acpi_tables?branch=main#cb5f06c747e45f54bc839c4aeea7fed9d49967df"
source = "git+https://github.com/rust-vmm/acpi_tables?branch=main#05a609136387cc1cc9b499cee4320020325c263f"
dependencies = [
"zerocopy",
]

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@ -116,6 +116,7 @@ impl Aml for AcpiGedDevice {
true,
self.address.0,
self.address.0 + GED_DEVICE_ACPI_SIZE as u64 - 1,
None,
)]),
),
&aml::OpRegion::new(

2
fuzz/Cargo.lock generated
View File

@ -5,7 +5,7 @@ version = 3
[[package]]
name = "acpi_tables"
version = "0.1.0"
source = "git+https://github.com/rust-vmm/acpi_tables?branch=main#98dcb0309d362dd83f6ffcac4f66914a2fbd5a73"
source = "git+https://github.com/rust-vmm/acpi_tables?branch=main#05a609136387cc1cc9b499cee4320020325c263f"
dependencies = [
"zerocopy",
]

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@ -1987,6 +1987,7 @@ impl Aml for CpuManager {
true,
acpi_address.0,
acpi_address.0 + CPU_MANAGER_ACPI_SIZE as u64 - 1,
None,
)]),
),
// OpRegion and Fields map MMIO range into individual field values

View File

@ -4302,6 +4302,7 @@ impl Aml for DeviceManager {
true,
self.acpi_address.0,
self.acpi_address.0 + DEVICE_MANAGER_ACPI_SIZE as u64 - 1,
None,
)]),
),
// OpRegion and Fields map MMIO range into individual field values

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@ -2244,6 +2244,7 @@ impl Aml for MemoryMethods {
true,
0x0000_0000_0000_0000u64,
0xFFFF_FFFF_FFFF_FFFEu64,
None,
)]),
),
&aml::CreateQWordField::new(
@ -2326,6 +2327,7 @@ impl Aml for MemoryManager {
true,
acpi_address.0,
acpi_address.0 + MEMORY_MANAGER_ACPI_SIZE as u64 - 1,
None,
)]),
),
// OpRegion and Fields map MMIO range into individual field values
@ -2421,6 +2423,7 @@ impl Aml for MemoryManager {
true,
min,
max,
None,
)]),
),
&aml::Method::new("_STA".into(), 0, false, vec![&aml::Return::new(&0xfu8)]),

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@ -353,17 +353,19 @@ impl Aml for PciSegment {
layout::MEM_32BIT_DEVICES_START.0 as u32,
(layout::MEM_32BIT_DEVICES_START.0 + layout::MEM_32BIT_DEVICES_SIZE - 1)
as u32,
None,
),
&aml::AddressSpace::new_memory(
aml::AddressSpaceCachable::NotCacheable,
true,
self.start_of_device_area,
self.end_of_device_area,
None,
),
#[cfg(target_arch = "x86_64")]
&aml::AddressSpace::new_io(0u16, 0x0cf7u16),
&aml::AddressSpace::new_io(0u16, 0x0cf7u16, None),
#[cfg(target_arch = "x86_64")]
&aml::AddressSpace::new_io(0x0d00u16, 0xffffu16),
&aml::AddressSpace::new_io(0x0d00u16, 0xffffu16, None),
]),
)
} else {
@ -381,6 +383,7 @@ impl Aml for PciSegment {
true,
self.start_of_device_area,
self.end_of_device_area,
None,
),
]),
)