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https://github.com/cloud-hypervisor/cloud-hypervisor.git
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build: Bump acpi_tables from cb5f06c
to 05a6091
Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
This commit is contained in:
parent
1faaa2cd0a
commit
f485922b78
2
Cargo.lock
generated
2
Cargo.lock
generated
@ -5,7 +5,7 @@ version = 3
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[[package]]
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name = "acpi_tables"
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version = "0.1.0"
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source = "git+https://github.com/rust-vmm/acpi_tables?branch=main#cb5f06c747e45f54bc839c4aeea7fed9d49967df"
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source = "git+https://github.com/rust-vmm/acpi_tables?branch=main#05a609136387cc1cc9b499cee4320020325c263f"
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dependencies = [
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"zerocopy",
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]
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@ -116,6 +116,7 @@ impl Aml for AcpiGedDevice {
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true,
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self.address.0,
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self.address.0 + GED_DEVICE_ACPI_SIZE as u64 - 1,
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None,
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)]),
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),
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&aml::OpRegion::new(
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2
fuzz/Cargo.lock
generated
2
fuzz/Cargo.lock
generated
@ -5,7 +5,7 @@ version = 3
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[[package]]
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name = "acpi_tables"
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version = "0.1.0"
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source = "git+https://github.com/rust-vmm/acpi_tables?branch=main#98dcb0309d362dd83f6ffcac4f66914a2fbd5a73"
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source = "git+https://github.com/rust-vmm/acpi_tables?branch=main#05a609136387cc1cc9b499cee4320020325c263f"
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dependencies = [
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"zerocopy",
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]
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@ -1987,6 +1987,7 @@ impl Aml for CpuManager {
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true,
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acpi_address.0,
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acpi_address.0 + CPU_MANAGER_ACPI_SIZE as u64 - 1,
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None,
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)]),
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),
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// OpRegion and Fields map MMIO range into individual field values
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@ -4302,6 +4302,7 @@ impl Aml for DeviceManager {
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true,
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self.acpi_address.0,
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self.acpi_address.0 + DEVICE_MANAGER_ACPI_SIZE as u64 - 1,
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None,
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)]),
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),
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// OpRegion and Fields map MMIO range into individual field values
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@ -2244,6 +2244,7 @@ impl Aml for MemoryMethods {
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true,
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0x0000_0000_0000_0000u64,
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0xFFFF_FFFF_FFFF_FFFEu64,
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None,
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)]),
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),
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&aml::CreateQWordField::new(
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@ -2326,6 +2327,7 @@ impl Aml for MemoryManager {
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true,
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acpi_address.0,
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acpi_address.0 + MEMORY_MANAGER_ACPI_SIZE as u64 - 1,
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None,
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)]),
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),
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// OpRegion and Fields map MMIO range into individual field values
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@ -2421,6 +2423,7 @@ impl Aml for MemoryManager {
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true,
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min,
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max,
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None,
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)]),
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),
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&aml::Method::new("_STA".into(), 0, false, vec![&aml::Return::new(&0xfu8)]),
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@ -353,17 +353,19 @@ impl Aml for PciSegment {
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layout::MEM_32BIT_DEVICES_START.0 as u32,
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(layout::MEM_32BIT_DEVICES_START.0 + layout::MEM_32BIT_DEVICES_SIZE - 1)
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as u32,
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None,
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),
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&aml::AddressSpace::new_memory(
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aml::AddressSpaceCachable::NotCacheable,
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true,
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self.start_of_device_area,
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self.end_of_device_area,
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None,
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),
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#[cfg(target_arch = "x86_64")]
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&aml::AddressSpace::new_io(0u16, 0x0cf7u16),
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&aml::AddressSpace::new_io(0u16, 0x0cf7u16, None),
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#[cfg(target_arch = "x86_64")]
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&aml::AddressSpace::new_io(0x0d00u16, 0xffffu16),
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&aml::AddressSpace::new_io(0x0d00u16, 0xffffu16, None),
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]),
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)
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} else {
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@ -381,6 +383,7 @@ impl Aml for PciSegment {
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true,
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self.start_of_device_area,
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self.end_of_device_area,
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None,
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),
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]),
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)
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